On Sat, July 11, 2020 at 22:23PM +0800, Shawn Guo <shawn...@kernel.org> wrote:
> -----Original Message-----
> From: Shawn Guo <shawn...@kernel.org>
> Sent: 2020年7月11日 22:23
> To: Qiang Zhao <qiang.z...@nxp.com>
> Cc: devicet...@vger.kernel.org; linux-kernel@vger.kernel.org; Leo Li
> <leoyang...@nxp.com>; Chuanhua Han <chuanhua....@nxp.com>
> Subject: Re: [RESEND PATCH 1/2] arm64: dts: lx2160a: add dspi controller DT
> nodes
>
> On Mon, Jun 22, 2020 at 04:31:08PM +0800, Qiang Zhao wrote:
> > From: Chuanhua Han <chuanhua....@nxp.com>
> >
> > Add the dspi support on lx2160
> >
> > Signed-off-by: Chuanhua Han <chuanhua....@nxp.com>
> > Signed-off-by: Bao Xiaowei <xiaowei....@nxp.com>
> > Signed-off-by: Hou Zhiqiang <zhiqiang....@nxp.com>
> > Signed-off-by: Zhao Qiang <qiang.z...@nxp.com>
>
> When you resend patches, please state why. Should I drop the patches I just
> applied and pick up this version instead?
>
Sorry for that, I resend just because I forgot to add myself in cc list.
>
> > ---
> > arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 39
> > ++++++++++++++++++++++++++
> > 1 file changed, 39 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> > b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> > index abaeb58..f56172f 100644
> > --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> > @@ -777,6 +777,45 @@
> > status = "disabled";
> > };
> >
> > + dspi0: spi@2100000 {
> > + compatible = "fsl,lx2160a-dspi", "fsl,ls2085a-dspi";
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + reg = <0x0 0x2100000 0x0 0x10000>;
> > + interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&clockgen 4 7>;
> > + clock-names = "dspi";
> > + spi-num-chipselects = <5>;
> > + bus-num = <0>;
> > + status = "disabled";
> > + };
> > +
> > + dspi1: spi@2110000 {
> > + compatible = "fsl,lx2160a-dspi", "fsl,ls2085a-dspi";
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + reg = <0x0 0x2110000 0x0 0x10000>;
> > + interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&clockgen 4 7>;
> > + clock-names = "dspi";
> > + spi-num-chipselects = <5>;
> > + bus-num = <1>;
> > + status = "disabled";
> > + };
> > +
> > + dspi2: spi@2120000 {
> > + compatible = "fsl,lx2160a-dspi", "fsl,ls2085a-dspi";
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + reg = <0x0 0x2120000 0x0 0x10000>;
> > + interrupts = <GIC_SPI 241 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&clockgen 4 7>;
> > + clock-names = "dspi";
> > + spi-num-chipselects = <5>;
> > + bus-num = <2>;
> > + status = "disabled";
> > + };
> > +
> > esdhc0: esdhc@2140000 {
> > compatible = "fsl,esdhc";
> > reg = <0x0 0x2140000 0x0 0x10000>;
> > --
> > 2.7.4
> >
Best Regards
Qiang Zhao
