On Wed, Sep 16, 2020 at 01:37:02PM +0800, Xu Yilun wrote: > This driver is for the EMIF private feature implemented under FPGA > Device Feature List (DFL) framework. It is used to expose memory > interface status information as well as memory clearing control. > > The purpose of memory clearing block is to zero out all private memory > when FPGA is to be reprogrammed. This gives users a reliable method to > prevent potential data leakage. > > Signed-off-by: Xu Yilun <[email protected]> > Signed-off-by: Russ Weight <[email protected]> > --- > v2: Adjust the position of this driver in Kconfig. > Improves the name of the Kconfig option. > Change the include dfl-bus.h to dfl.h, cause the previous patchset > renames the file. > Some minor fixes and comment improvement. > --- > .../ABI/testing/sysfs-bus-dfl-devices-emif | 25 +++ > drivers/memory/Kconfig | 9 + > drivers/memory/Makefile | 2 + > drivers/memory/dfl-emif.c | 207 > +++++++++++++++++++++ > 4 files changed, 243 insertions(+) > create mode 100644 Documentation/ABI/testing/sysfs-bus-dfl-devices-emif > create mode 100644 drivers/memory/dfl-emif.c > > diff --git a/Documentation/ABI/testing/sysfs-bus-dfl-devices-emif > b/Documentation/ABI/testing/sysfs-bus-dfl-devices-emif > new file mode 100644 > index 0000000..56f97dc > --- /dev/null > +++ b/Documentation/ABI/testing/sysfs-bus-dfl-devices-emif > @@ -0,0 +1,25 @@ > +What: /sys/bus/dfl/devices/dfl_dev.X/infX_cal_fail > +Date: Sep 2020 > +KernelVersion: 5.10 > +Contact: Xu Yilun <[email protected]> > +Description: Read-only. It indicates if the calibration failed on this > + memory interface. "1" for calibration failure, "0" for OK. > + Format: %u > + > +What: /sys/bus/dfl/devices/dfl_dev.X/infX_init_done > +Date: Sep 2020 > +KernelVersion: 5.10 > +Contact: Xu Yilun <[email protected]> > +Description: Read-only. It indicates if the initialization completed on > + this memory interface. "1" for initialization complete, "0" > + for not yet. > + Format: %u > + > +What: /sys/bus/dfl/devices/dfl_dev.X/infX_clear > +Date: Sep 2020 > +KernelVersion: 5.10 > +Contact: Xu Yilun <[email protected]> > +Description: Write-only. Writing "1" to this file will zero out all memory > + data in this memory interface. Writing of other values is > + invalid. > + Format: %u > diff --git a/drivers/memory/Kconfig b/drivers/memory/Kconfig > index 8072204..8dc819f 100644 > --- a/drivers/memory/Kconfig > +++ b/drivers/memory/Kconfig > @@ -136,6 +136,15 @@ config TI_EMIF_SRAM > sequence so this driver provides several relocatable PM functions > for the SoC PM code to use. > > +config FPGA_DFL_EMIF > + tristate "FPGA DFL EMIF Driver" > + depends on FPGA_DFL && HAS_IOMEM > + help > + This driver is for the EMIF private feature implemented under > + FPGA Device Feature List (DFL) framework. It is used to expose > + memory interface status information as well as memory clearing > + control. > + > config MVEBU_DEVBUS > bool "Marvell EBU Device Bus Controller" > default y if PLAT_ORION > diff --git a/drivers/memory/Makefile b/drivers/memory/Makefile > index e71cf7b..0afbf39 100644 > --- a/drivers/memory/Makefile > +++ b/drivers/memory/Makefile > @@ -39,3 +39,5 @@ $(obj)/ti-emif-asm-offsets.h: $(obj)/emif-asm-offsets.s > FORCE > > targets += emif-asm-offsets.s > clean-files += ti-emif-asm-offsets.h > + > +obj-$(CONFIG_FPGA_DFL_EMIF) += dfl-emif.o
It there is going to be a resend: this as well has to go next to CONFIG_TI_EMIF_SRAM. Otherwise I will fix it up while applying. Best regards, Krzysztof
