On Tue, Dec 01, 2020 at 10:09:22AM -0800, Andy Lutomirski wrote: > On Tue, Dec 1, 2020 at 2:16 AM Peter Zijlstra <[email protected]> wrote: > > > - membarrier() does not explicitly sync_core() remote CPUs either; > > > instead, it relies on the assumption that an IPI will result in a > > > core sync. On x86, I think this may be true in practice, but > > > it's not architecturally reliable. In particular, the SDM and > > > APM do not appear to guarantee that interrupt delivery is > > > serializing. > > > > Right, I don't think we rely on that, we do rely on interrupt delivery > > providing order though -- as per the previous email.
order, not serializing. > I looked for a bit, and I couldn't find anything in the SDM or APM to > support this, and I would be rather surprised if other architectures > synchronize their instruction streams on interrupt delivery. On > architectures without hardware I$ coherency and with actual fast > interrupts, I would be surprised if interrupts ensured I$ coherency > with prior writes from other cores. Data, not I$. smp_mb() has nothing on I$. The claim is that smp_mb() at the start of an IPI is pointless (as a means of ordering against the CPU raising the IPI). Doing smp_mb() before raising the IPI does make sense and is actually done IIRC.
