On Tue, Dec 01, 2020 at 10:09:22AM -0800, Andy Lutomirski wrote:
> > smp_call_function_single(.wait=1) already orders against completion of
> > the IPI. Do we really need more?
>
> What kind of order does it provide? A quick skim of the code suggests
> that it's an acquire barrier, but I think we need a full sequential
> consistency barrier, at least on sufficiently weakly ordered
> architectures. On x86, loads are ordered and this is probably
> irrelevant. Also, this barrier was already there (it's the one I
> deleted below), and I think that removing it should be its own patch
> if we want to go that route.
smp_mb()
raise-IPI ---->
<IPI>
/* do crud */
STORE-RELEASE csd->lock, 0;
</IPI/
LOAD-ACQUIRE csd->lock
