On 2021-04-20 13:34, Thomas Bogendoerfer wrote:
IDT 79rc3243x SoCs have rather simple interrupt controllers connected
to the MIPS CPU interrupt lines. Each of them has room for up to
32 interrupts.

Signed-off-by: Thomas Bogendoerfer <tsbog...@alpha.franken.de>

Is there a DT binding for this irqchip? The code looks fine, but
it'd be good if the binding was merged at the same time as the driver.


Jazz is not dead. It just smells funny...

Reply via email to