On Tue, Apr 20, 2021 at 06:34:59PM +0100, Marc Zyngier wrote: > On 2021-04-20 13:34, Thomas Bogendoerfer wrote: > > IDT 79rc3243x SoCs have rather simple interrupt controllers connected > > to the MIPS CPU interrupt lines. Each of them has room for up to > > 32 interrupts. > > > > Signed-off-by: Thomas Bogendoerfer <tsbog...@alpha.franken.de> > > Is there a DT binding for this irqchip? The code looks fine, but > it'd be good if the binding was merged at the same time as the driver.
I'll write one and send a v2. Thomas. -- Crap can work. Given enough thrust pigs will fly, but it's not necessarily a good idea. [ RFC1925, 2.3 ]