On 12/12/2025 22:55, David Heidelberg via B4 Relay wrote:
From: David Heidelberg <[email protected]>Usually, the supply is around 1.2 V, not 1.8 V. Rather remove mention of voltage from the description. Fixes: 849139d46d09 ("media: dt-bindings: media: camss: Fixup vdda regulator descriptions sdm845") Signed-off-by: David Heidelberg <[email protected]> --- Added only Fixes tag for the initial commit, not all the copy-paste propagated ones. --- Documentation/devicetree/bindings/media/qcom,sa8775p-camss.yaml | 2 +- Documentation/devicetree/bindings/media/qcom,sc7280-camss.yaml | 2 +- Documentation/devicetree/bindings/media/qcom,sc8280xp-camss.yaml | 2 +- Documentation/devicetree/bindings/media/qcom,sdm670-camss.yaml | 2 +- Documentation/devicetree/bindings/media/qcom,sdm845-camss.yaml | 2 +- Documentation/devicetree/bindings/media/qcom,sm8250-camss.yaml | 2 +- 6 files changed, 6 insertions(+), 6 deletions(-) diff --git a/Documentation/devicetree/bindings/media/qcom,sa8775p-camss.yaml b/Documentation/devicetree/bindings/media/qcom,sa8775p-camss.yaml index 019caa2b09c32..9009cfe993d75 100644 --- a/Documentation/devicetree/bindings/media/qcom,sa8775p-camss.yaml +++ b/Documentation/devicetree/bindings/media/qcom,sa8775p-camss.yaml @@ -130,7 +130,7 @@ properties: vdda-pll-supply: description: - Phandle to 1.8V regulator supply to PHY refclk pll block. + Phandle to regulator supply to PHY refclk pll block. ports: $ref: /schemas/graph.yaml#/properties/ports diff --git a/Documentation/devicetree/bindings/media/qcom,sc7280-camss.yaml b/Documentation/devicetree/bindings/media/qcom,sc7280-camss.yaml index ee35e3bc97ffd..cb922f90fe900 100644 --- a/Documentation/devicetree/bindings/media/qcom,sc7280-camss.yaml +++ b/Documentation/devicetree/bindings/media/qcom,sc7280-camss.yaml @@ -129,7 +129,7 @@ properties: vdda-pll-supply: description: - Phandle to 1.8V regulator supply to PHY refclk pll block. + Phandle to regulator supply to PHY refclk pll block. ports: $ref: /schemas/graph.yaml#/properties/ports diff --git a/Documentation/devicetree/bindings/media/qcom,sc8280xp-camss.yaml b/Documentation/devicetree/bindings/media/qcom,sc8280xp-camss.yaml index c99fe4106eee9..2231d7216f62a 100644 --- a/Documentation/devicetree/bindings/media/qcom,sc8280xp-camss.yaml +++ b/Documentation/devicetree/bindings/media/qcom,sc8280xp-camss.yaml @@ -268,7 +268,7 @@ properties: vdda-pll-supply: description: - Phandle to 1.8V regulator supply to PHY refclk pll block. + Phandle to regulator supply to PHY refclk pll block. required: - clock-names diff --git a/Documentation/devicetree/bindings/media/qcom,sdm670-camss.yaml b/Documentation/devicetree/bindings/media/qcom,sdm670-camss.yaml index 35c40fe223767..8e6ca94c88695 100644 --- a/Documentation/devicetree/bindings/media/qcom,sdm670-camss.yaml +++ b/Documentation/devicetree/bindings/media/qcom,sdm670-camss.yaml @@ -95,7 +95,7 @@ properties: vdda-pll-supply: description: - Phandle to 1.8V regulator supply to PHY refclk pll block. + Phandle to regulator supply to PHY refclk pll block. ports: $ref: /schemas/graph.yaml#/properties/ports diff --git a/Documentation/devicetree/bindings/media/qcom,sdm845-camss.yaml b/Documentation/devicetree/bindings/media/qcom,sdm845-camss.yaml index 82bf4689d3300..d50e096b900db 100644 --- a/Documentation/devicetree/bindings/media/qcom,sdm845-camss.yaml +++ b/Documentation/devicetree/bindings/media/qcom,sdm845-camss.yaml @@ -211,7 +211,7 @@ properties: vdda-pll-supply: description: - Phandle to 1.8V regulator supply to PHY refclk pll block. + Phandle to regulator supply to PHY refclk pll block. required: - clock-names diff --git a/Documentation/devicetree/bindings/media/qcom,sm8250-camss.yaml b/Documentation/devicetree/bindings/media/qcom,sm8250-camss.yaml index ebf68ff4ab961..ccd2d024bfd10 100644 --- a/Documentation/devicetree/bindings/media/qcom,sm8250-camss.yaml +++ b/Documentation/devicetree/bindings/media/qcom,sm8250-camss.yaml @@ -300,7 +300,7 @@ properties: vdda-pll-supply: description: - Phandle to 1.8V regulator supply to PHY refclk pll block. + Phandle to regulator supply to PHY refclk pll block. required: - clock-names --- base-commit: d9771d0dbe18dd643760431870a6abf9b0866bb0 change-id: 20251212-docs-camss-fixes-0fa525271951 Best regards, -- David Heidelberg <[email protected]>
I think this is copy/paste legacy error. The voltage level should be more usefully encoded in the name anyway. --- bod
