On Thu, 07 May 2026 22:36:17 -0700, Changhuang Liang wrote: > Add bindings for the System-1 clocks and reset generator (SYS1CRG) on > JHB100 SoC. > > Signed-off-by: Changhuang Liang <[email protected]> > --- > .../clock/starfive,jhb100-sys1crg.yaml | 71 +++++++++++++++++++ > .../dt-bindings/clock/starfive,jhb100-crg.h | 20 ++++++ > .../dt-bindings/reset/starfive,jhb100-crg.h | 11 +++ > 3 files changed, 102 insertions(+) > create mode 100644 > Documentation/devicetree/bindings/clock/starfive,jhb100-sys1crg.yaml >
Reviewed-by: Rob Herring (Arm) <[email protected]>
