When attempting TSC recalibration post-boot, which is only done for ancient CPUS (P4 and K7) on SMP=n kernels, assert that the TSC frequency isn't known (explicitly provided by hardware) by way of MSR or CPUID, and bail if the impossible happens. In practice, recalibration and TSC_KNOWN_FREQ are mutually exclusive, as TSC_KNOWN_FREQ will only be set when running on hardware that was released decades after recalibration was obsoleted, but but it's hard to see that, especially when looking at just the TSC code.
Note, the WARN can likely be tripped by running in a virtual machine and concocting an impossible CPU model, e.g. by combining a P4 signature with CPUID 0x15. This is working as intended, as such a virtual CPU model is wildly out-of-spec and is not supported. Signed-off-by: Sean Christopherson <[email protected]> --- arch/x86/kernel/tsc.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c index 4d6a446645c0..4393902c0ddd 100644 --- a/arch/x86/kernel/tsc.c +++ b/arch/x86/kernel/tsc.c @@ -930,6 +930,9 @@ void recalibrate_cpu_khz(void) if (!boot_cpu_has(X86_FEATURE_TSC)) return; + if (WARN_ON_ONCE(cpu_feature_enabled(X86_FEATURE_TSC_KNOWN_FREQ))) + return; + cpu_khz = x86_platform.calibrate_cpu(); tsc_khz = x86_platform.calibrate_tsc(); if (tsc_khz == 0) -- 2.55.0.rc0.799.gd6f94ed593-goog
