Define the binding for the clock controller functionality present in the Toshiba TC9564 SoC.
Co-developed-by: Daniel Thompson <[email protected]> Signed-off-by: Daniel Thompson <[email protected]> Signed-off-by: Alex Elder <[email protected]> --- .../bindings/clock/toshiba,tc9564-clock.yaml | 64 +++++++++++++++++++ MAINTAINERS | 7 ++ include/dt-bindings/clock/toshiba,tc9564.h | 54 ++++++++++++++++ 3 files changed, 125 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/toshiba,tc9564-clock.yaml create mode 100644 include/dt-bindings/clock/toshiba,tc9564.h diff --git a/Documentation/devicetree/bindings/clock/toshiba,tc9564-clock.yaml b/Documentation/devicetree/bindings/clock/toshiba,tc9564-clock.yaml new file mode 100644 index 0000000000000..cc7019bd240e4 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/toshiba,tc9564-clock.yaml @@ -0,0 +1,64 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/toshiba,tc9564-clock.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Toshiba TC9564 Clock and Reset Controller + +maintainers: + - Alex Elder <[email protected]> + - Daniel Thompson <[email protected]> + +description: | + The Toshiba TC9564 is an SoC accessed by a host system through the + upstream PCIe port on the PCIe switch it implements. The switch + includes an embedded PCIe endpoint that provides access to various + SoC peripherals (including a clock/reset controller) via its BARs. + + The SoC is represented using a devicetree PCI endpoint bus, so the + clock controller is bound to its driver using a platform driver + compatible string. All of the clocks are simple gate clocks. + + A total of 21 clocks are implemented, though two of these are not + controllable. Access to the clock controller relies on PCIe being + functional, so the PCIe clock is assumed to be always on. Similarly, + the PCIe controller relies on I2C, so the I2C clock is also assumed + to be always on. + + In addition, 13 resets are implemented. Similar to clocks, the PCIe + and I2C resets are assumed to be deasserted and cannot be controlled. + + Clock and reset ids are defined in <dt-bindings/clock/toshiba,tc9564.h>. + +properties: + compatible: + const: toshiba,tc9564-clock + + reg: + maxItems: 1 + + "#clock-cells": + const: 1 + + "#reset-cells": + const: 1 + +required: + - compatible + - reg + - "#clock-cells" + - "#reset-cells" + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/clock/toshiba,tc9564.h> + + clock@1004 { + compatible = "toshiba,tc9564-clock"; + reg = <0x1004 0x20>; + #clock-cells = <1>; + #reset-cells = <1>; + }; diff --git a/MAINTAINERS b/MAINTAINERS index b2d3257b8f892..66d0e7e65adcb 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -27670,6 +27670,13 @@ F: Documentation/devicetree/bindings/media/i2c/toshiba,tc358743.txt F: drivers/media/i2c/tc358743* F: include/media/i2c/tc358743.h +TOSHIBA TC9564 CLOCK DRIVER +M: Alex Elder <[email protected]> +M: Daniel Thompson <[email protected]> +S: Maintained +F: Documentation/devicetree/bindings/clock/toshiba,tc9564-clock.yaml +F: include/dt-bindings/clock/toshiba,tc9564.h + TOSHIBA TC9564 PCI DRIVER M: Alex Elder <[email protected]> M: Daniel Thompson <[email protected]> diff --git a/include/dt-bindings/clock/toshiba,tc9564.h b/include/dt-bindings/clock/toshiba,tc9564.h new file mode 100644 index 0000000000000..75732fddd3025 --- /dev/null +++ b/include/dt-bindings/clock/toshiba,tc9564.h @@ -0,0 +1,54 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ + +/* + * Copyright (C) 2026 by RISCstar Solutions Corporation. All rights reserved. + */ + +#ifndef __ClOCK_TOSHIBA_TC9564_H__ +#define __ClOCK_TOSHIBA_TC9564_H__ + +/* Clock IDs */ + +#define CLOCK_MCU 0 +#define CLOCK_INTC 1 +/* #define CLOCK_PCIE 2 */ +/* #define CLOCK_I2C 3 */ +#define CLOCK_SRAM 4 +#define CLOCK_UART 5 +#define CLOCK_MSIGEN 6 +#define CLOCK_PLL 7 +#define CLOCK_SGMII 8 +#define CLOCK_REFCLKO 9 + +#define CLOCK_MAC0_TX 10 +#define CLOCK_MAC0_RX 11 +#define CLOCK_MAC0_125M 12 +#define CLOCK_MAC0_312_5M 13 +#define CLOCK_MAC0_ALL 14 + +#define CLOCK_MAC1_TX 15 +#define CLOCK_MAC1_RX 16 +#define CLOCK_MAC1_RMII 17 +#define CLOCK_MAC1_125M 18 +#define CLOCK_MAC1_312_5M 19 +#define CLOCK_MAC1_ALL 20 + +/* Reset IDs */ + +#define RESET_MCU 0 +#define RESET_MCU1 1 +#define RESET_MSIGEN 2 +#define RESET_INTC 3 +#define RESET_UART 4 +/* #define RESET_I2C 5 */ +/* #define RESET_PCIE 6 */ + +#define RESET_MAC0_MAC 7 +#define RESET_MAC0_PMA 8 +#define RESET_MAC0_XPCS 9 + +#define RESET_MAC1_MAC 10 +#define RESET_MAC1_PMA 11 +#define RESET_MAC1_XPCS 12 + +#endif /* __ClOCK_TOSHIBA_TC9564_H__*/ -- 2.53.0
