On Tue, 2012-09-18 at 12:47 +0530, viresh kumar wrote:
> On Mon, Sep 17, 2012 at 1:09 PM, Andy Shevchenko
> <[email protected]> wrote:
> > @@ -555,8 +594,36 @@ static void dw_dma_tasklet(unsigned long data)
> > dwc_handle_cyclic(dw, dwc, status_err, status_xfer);
> > else if (status_err & (1 << i))
> > dwc_handle_error(dw, dwc);
> > - else if (status_xfer & (1 << i))
> > + else if (status_xfer & (1 << i)) {
> > + unsigned long flags;
> > +
> > + spin_lock_irqsave(&dwc->lock, flags);
> > + if (test_bit(DW_DMA_IS_SOFT_LLP, &dwc->flags)) {
> > + if (dwc->tx_node_active != dwc->tx_list) {
> > + struct dw_desc *desc =
> > +
> > list_entry(dwc->tx_node_active,
> > + struct dw_desc,
> > + desc_node);
>
> can come in single line.
Depends on checkpatch.pl. Anyway I'll try to squeeze it.
> > @@ -647,12 +714,6 @@ dwc_prep_dma_memcpy(struct dma_chan *chan, dma_addr_t
> > dest, dma_addr_t src,
> > unsigned int dst_width;
> > u32 ctllo;
> >
> > - if (dwc->nollp) {
> > - dev_dbg(chan2dev(&dwc->chan),
> > - "channel doesn't support LLP transfers\n");
> > - return NULL;
> > - }
> > -
>
> :)
> You should actually merge 6/7 with 7/7... You can't revert something
> in the same patchset.
Ok. It was done just in regard to have a bisectability working.
--
Andy Shevchenko <[email protected]>
Intel Finland Oy
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