On Thu, Aug 15, 2013 at 01:40:40PM +0200, Peter Zijlstra wrote:
> On Tue, Aug 13, 2013 at 06:39:11PM +0200, Jiri Olsa wrote:
> > Currently the intel_pmu_enable_all enables all possible
> > events, which is not allways desired. One case (there'll
> > be probably more) is:
> >
> > - event hits throttling threshold
> > - NMI stops event
> > - intel_pmu_enable_all starts it back on the NMI exit
> >
>
>
> > +++ b/arch/x86/kernel/cpu/perf_event_intel.c
> > @@ -912,11 +912,13 @@ static void intel_pmu_disable_all(void)
> > static void intel_pmu_enable_all(int added)
> > {
> > struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
> > + u64 active_mask = *((u64*) cpuc->active_mask);
> >
> > intel_pmu_pebs_enable_all();
> > intel_pmu_lbr_enable_all();
> > wrmsrl(MSR_CORE_PERF_GLOBAL_CTRL,
> > - x86_pmu.intel_ctrl & ~cpuc->intel_ctrl_guest_mask);
> > + x86_pmu.intel_ctrl & ~cpuc->intel_ctrl_guest_mask
> > + & active_mask);
>
> Garh.. you made my head hurt :-)
>
> I think its a NOP; this is the global ctrl register but
> intel_pmu_disable_event() writes PERFEVTSELx.EN = 0, so even if you
> enable it in the global mask, the event should still be disabled.
hum, I might have misread the doc.. strange the test
showed this result
jirka
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