According to the datasheet, the attribute of Interrupt Status Register is RW0S, which means: Software can read the register. Software can also "write 1 to clear". "write 0" has no effect. Thus switch the read/modify/write to a simple write clear.
A read/modify/write does not make sense for an irq status register like this, since otherwise a read/modify/write can race with a device raising an interrupt and then clear the pending bit unintentionally. Signed-off-by: Axel Lin <axel....@ingics.com> --- Hi Tony, I don't have this h/w to test, I'd appreciate if you can review and test this patch. Regards, Axel drivers/irqchip/irq-vt8500.c | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-) diff --git a/drivers/irqchip/irq-vt8500.c b/drivers/irqchip/irq-vt8500.c index eb6e91e..a0085bc 100644 --- a/drivers/irqchip/irq-vt8500.c +++ b/drivers/irqchip/irq-vt8500.c @@ -87,14 +87,10 @@ static void vt8500_irq_mask(struct irq_data *d) void __iomem *base = priv->base; void __iomem *stat_reg = base + VT8500_ICIS + (d->hwirq < 32 ? 0 : 4); u8 edge, dctr; - u32 status; edge = readb(base + VT8500_ICDC + d->hwirq) & VT8500_EDGE; if (edge) { - status = readl(stat_reg); - - status |= (1 << (d->hwirq & 0x1f)); - writel(status, stat_reg); + writel(BIT(d->hwirq & 0x1f), stat_reg); } else { dctr = readb(base + VT8500_ICDC + d->hwirq); dctr &= ~VT8500_INT_ENABLE; -- 1.8.3.2 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/