hi there,

redhat 6, pII 350

i've read the how-to's, but I still can't get my modem to work.  The
modem is a SupraExpress 56i Sp V.90, it's isa pnp. When I run 'isapnp
isapnp.conf', it always returns an io conflict error message (I've tried
all values in my isapnp.conf). Here's my isapnp.conf, my
/proc/interrupts, and my /proc/ioports.  

     CPU0       
  0:      39738          XT-PIC  timer
  1:       1963          XT-PIC  keyboard
  2:          0          XT-PIC  cascade
  6:         15          XT-PIC  floppy
  8:          2          XT-PIC  rtc
 12:          0          XT-PIC  PS/2 Mouse
 13:          1          XT-PIC  fpu
 14:      38197          XT-PIC  ide0
 15:          5          XT-PIC  ide1
NMI:          0

0000-001f : dma1
0020-003f : pic1
0040-005f : timer
0060-006f : keyboard
0070-007f : rtc
0080-008f : dma page reg
00a0-00bf : pic2
00c0-00df : dma2
00f0-00ff : fpu
0170-0177 : ide1
01f0-01f7 : ide0
02f8-02ff : serial(auto)
0376-0376 : ide1
03c0-03df : vga+
03f0-03f5 : floppy
03f6-03f6 : ide0
03f7-03f7 : floppy DIR
03f8-03ff : serial(auto)
f000-f007 : ide0
f008-f00f : ide1

# $Id: pnpdump.c,v 1.18 1999/02/14 22:47:18 fox Exp $
# This is free software, see the sources for details.
# This software has NO WARRANTY, use at your OWN RISK
#
# For details of this file format, see isapnp.conf(5)
#
# For latest information and FAQ on isapnp and pnpdump see:
# http://www.roestock.demon.co.uk/isapnptools/
#
# Compiler flags: -DREALTIME -DNEEDSETSCHEDULER -DABORT_ONRESERR
#
# Trying port address 0203
# Board 1 has serial identifier dd 00 01 64 af 80 24 b0 4e
# Board 2 has serial identifier ee 00 14 b8 da 2b 00 8c 0e

# (DEBUG)
(READPORT 0x0203)
(ISOLATE PRESERVE)
(IDENTIFY *)
(VERBOSITY 2)
(CONFLICT (IO FATAL)(IRQ FATAL)(DMA FATAL)(MEM FATAL)) # or WARNING

# Card 1: (serial identifier dd 00 01 64 af 80 24 b0 4e)
# Vendor Id SUP2480, Serial Number 91311, checksum 0xDD.
# Version 1.0, Vendor version 0.0
# ANSI string -->SupraExpress 56i Sp V.90<--
#
# Logical device id SUP2480
#     Device support I/O range check register
#     Device supports vendor reserved register @ 0x38
#     Device supports vendor reserved register @ 0x3a
#
# Edit the entries below to uncomment out the configuration required.
# Note that only the first value of any range is given, this may be
changed if required
# Don't forget to uncomment the activate (ACT Y) when happy

(CONFIGURE SUP2480/91311 (LD 0
#     Compatible device id SUP2080

# Multiple choice time, choose one only !

#     Start dependent functions: priority acceptable
#       Logical device decodes 16 bit IO address lines
#             Minimum IO base address 0x03f8
#             Maximum IO base address 0x03f8
#             IO base alignment 8 bytes
#             Number of IO addresses required: 8
# (IO 0 (SIZE 8) (BASE 0x03f8) (CHECK))
#       IRQ 4.
#             High true, edge sensitive interrupt (by default)
# (INT 0 (IRQ 4 (MODE +E)))

#       Start dependent functions: priority acceptable
#       Logical device decodes 16 bit IO address lines
#             Minimum IO base address 0x02f8
#             Maximum IO base address 0x02f8
#             IO base alignment 8 bytes
#             Number of IO addresses required: 8
# (IO 0 (SIZE 8) (BASE 0x02f8) (CHECK))
#       IRQ 3.
#             High true, edge sensitive interrupt (by default)
# (INT 0 (IRQ 3 (MODE +E)))

#       Start dependent functions: priority acceptable
#       Logical device decodes 16 bit IO address lines
#             Minimum IO base address 0x03e8
#             Maximum IO base address 0x03e8
#             IO base alignment 8 bytes
#             Number of IO addresses required: 8
# (IO 0 (SIZE 8) (BASE 0x03e8) (CHECK))
#       IRQ 4.
#             High true, edge sensitive interrupt (by default)
# (INT 0 (IRQ 4 (MODE +E)))

#       Start dependent functions: priority acceptable
#       Logical device decodes 16 bit IO address lines
#             Minimum IO base address 0x02e8
#             Maximum IO base address 0x02e8
#             IO base alignment 8 bytes
#             Number of IO addresses required: 8
# (IO 0 (SIZE 8) (BASE 0x02e8) (CHECK))
#       IRQ 3.
#             High true, edge sensitive interrupt (by default)
# (INT 0 (IRQ 3 (MODE +E)))

#       Start dependent functions: priority acceptable
#       Logical device decodes 16 bit IO address lines
#             Minimum IO base address 0x03e8
#             Maximum IO base address 0x03e8
#             IO base alignment 8 bytes
#             Number of IO addresses required: 8
# (IO 0 (SIZE 8) (BASE 0x03e8) (CHECK))
#       IRQ 5.
#             High true, edge sensitive interrupt (by default)
# (INT 0 (IRQ 5 (MODE +E)))

#       Start dependent functions: priority acceptable
#       Logical device decodes 16 bit IO address lines
#             Minimum IO base address 0x02e8
#             Maximum IO base address 0x02e8
#             IO base alignment 8 bytes
#             Number of IO addresses required: 8
# (IO 0 (SIZE 8) (BASE 0x02e8) (CHECK))
#       IRQ 5.
#             High true, edge sensitive interrupt (by default)
# (INT 0 (IRQ 5 (MODE +E)))

#       Start dependent functions: priority acceptable
#       Logical device decodes 16 bit IO address lines
#             Minimum IO base address 0x03e8
#             Maximum IO base address 0x03e8
#             IO base alignment 8 bytes
#             Number of IO addresses required: 8
# (IO 0 (SIZE 8) (BASE 0x03e8) (CHECK))
#       IRQ 3, 4, 5, 7, 10, 11, 12 or 15.
#             High true, edge sensitive interrupt (by default)
# (INT 0 (IRQ 3 (MODE +E)))

#       Start dependent functions: priority acceptable
#       Logical device decodes 16 bit IO address lines
#             Minimum IO base address 0x02e8
#             Maximum IO base address 0x02e8
#             IO base alignment 8 bytes
#             Number of IO addresses required: 8
# (IO 0 (SIZE 8) (BASE 0x02e8) (CHECK))
#       IRQ 3, 4, 5, 7, 10, 11, 12 or 15.
#             High true, edge sensitive interrupt (by default)
# (INT 0 (IRQ 3 (MODE +E)))

#       Start dependent functions: priority acceptable
#       Logical device decodes 16 bit IO address lines
#             Minimum IO base address 0x03f8
#             Maximum IO base address 0x03f8
#             IO base alignment 8 bytes
#             Number of IO addresses required: 8
# (IO 0 (SIZE 8) (BASE 0x03f8) (CHECK))
#       IRQ 3, 4, 5, 7, 10, 11, 12 or 15.
#             High true, edge sensitive interrupt (by default)
# (INT 0 (IRQ 3 (MODE +E)))

#       Start dependent functions: priority acceptable
#       Logical device decodes 16 bit IO address lines
#             Minimum IO base address 0x02f8
#             Maximum IO base address 0x02f8
#             IO base alignment 8 bytes
#             Number of IO addresses required: 8
# (IO 0 (SIZE 8) (BASE 0x02f8) (CHECK))
#       IRQ 3, 4, 5, 7, 10, 11, 12 or 15.
#             High true, edge sensitive interrupt (by default)
# (INT 0 (IRQ 3 (MODE +E)))

#       Start dependent functions: priority acceptable
#       Logical device decodes 16 bit IO address lines
#             Minimum IO base address 0x0200
#             Maximum IO base address 0x03f8
#             IO base alignment 8 bytes
#             Number of IO addresses required: 8
 (IO 0 (SIZE 8) (BASE 0x0200) (CHECK))
#       IRQ 3, 4, 5, 7, 10, 11, 12 or 15.
#             High true, edge sensitive interrupt (by default)
 (INT 0 (IRQ 3 (MODE +E)))

#     End dependent functions
 (NAME "SUP2480/91311[0]{SupraExpress 56i Sp V.90}")
 (ACT Y)
))
# End tag... Checksum 0x00 (OK)

# Card 2: (serial identifier ee 00 14 b8 da 2b 00 8c 0e)
# Vendor Id CTL002b, Serial Number 1358042, checksum 0xEE.
#     Version 1.0, Vendor version 2.0
#     ANSI string -->Creative SB16 PnP<--
#
# Logical device id CTL0031
#     Device supports vendor reserved register @ 0x38
#     Device supports vendor reserved register @ 0x3a
#
# Edit the entries below to uncomment out the configuration required.
# Note that only the first value of any range is given, this may be
changed if required
# Don't forget to uncomment the activate (ACT Y) when happy

(CONFIGURE CTL002b/1358042 (LD 0
#     ANSI string -->Audio<--

# Multiple choice time, choose one only !

#     Start dependent functions: priority preferred
#       IRQ 5.
#             High true, edge sensitive interrupt (by default)
# (INT 0 (IRQ 5 (MODE +E)))
#       First DMA channel 1.
#             8 bit DMA only
#             Logical device is not a bus master
#             DMA may execute in count by byte mode
#             DMA may not execute in count by word mode
#             DMA channel speed in compatible mode
# (DMA 0 (CHANNEL 1))
#       Next DMA channel 5.
#             16 bit DMA only
#             Logical device is not a bus master
#             DMA may not execute in count by byte mode
#             DMA may execute in count by word mode
#             DMA channel speed in compatible mode
# (DMA 1 (CHANNEL 5))
#       Logical device decodes 16 bit IO address lines
#             Minimum IO base address 0x0220
#             Maximum IO base address 0x0220
#             IO base alignment 1 bytes
#             Number of IO addresses required: 16
# (IO 0 (SIZE 16) (BASE 0x0220))
#       Logical device decodes 16 bit IO address lines
#             Minimum IO base address 0x0330
#             Maximum IO base address 0x0330
#             IO base alignment 1 bytes
#             Number of IO addresses required: 2
# (IO 1 (SIZE 2) (BASE 0x0330))
#       Logical device decodes 16 bit IO address lines
#             Minimum IO base address 0x0388
#             Maximum IO base address 0x0388
#             IO base alignment 1 bytes
#             Number of IO addresses required: 4
# (IO 2 (SIZE 4) (BASE 0x0388))

#       Start dependent functions: priority acceptable
#       IRQ 5, 7 or 10.
#             High true, edge sensitive interrupt (by default)
# (INT 0 (IRQ 5 (MODE +E)))
#       First DMA channel 0, 1 or 3.
#             8 bit DMA only
#             Logical device is not a bus master
#             DMA may execute in count by byte mode
#             DMA may not execute in count by word mode
#             DMA channel speed in compatible mode
# (DMA 0 (CHANNEL 0))
#       Next DMA channel 5, 6 or 7.
#             16 bit DMA only
#             Logical device is not a bus master
#             DMA may not execute in count by byte mode
#             DMA may execute in count by word mode
#             DMA channel speed in compatible mode
# (DMA 1 (CHANNEL 5))
#       Logical device decodes 16 bit IO address lines
#             Minimum IO base address 0x0220
#             Maximum IO base address 0x0280
#             IO base alignment 32 bytes
#             Number of IO addresses required: 16
# (IO 0 (SIZE 16) (BASE 0x0220))
#       Logical device decodes 16 bit IO address lines
#             Minimum IO base address 0x0300
#             Maximum IO base address 0x0330
#             IO base alignment 48 bytes
#             Number of IO addresses required: 2
# (IO 1 (SIZE 2) (BASE 0x0300))
#       Logical device decodes 16 bit IO address lines
#             Minimum IO base address 0x0388
#             Maximum IO base address 0x0388
#             IO base alignment 1 bytes
#             Number of IO addresses required: 4
# (IO 2 (SIZE 4) (BASE 0x0388))

#       Start dependent functions: priority acceptable
#       IRQ 5, 7 or 10.
#             High true, edge sensitive interrupt (by default)
# (INT 0 (IRQ 5 (MODE +E)))
#       First DMA channel 0, 1 or 3.
#             8 bit DMA only
#             Logical device is not a bus master
#             DMA may execute in count by byte mode
#             DMA may not execute in count by word mode
#             DMA channel speed in compatible mode
# (DMA 0 (CHANNEL 0))
#       Next DMA channel 5, 6 or 7.
#             16 bit DMA only
#             Logical device is not a bus master
#             DMA may not execute in count by byte mode
#             DMA may execute in count by word mode
#             DMA channel speed in compatible mode
# (DMA 1 (CHANNEL 5))
#       Logical device decodes 16 bit IO address lines
#             Minimum IO base address 0x0220
#             Maximum IO base address 0x0280
#             IO base alignment 32 bytes
#             Number of IO addresses required: 16
# (IO 0 (SIZE 16) (BASE 0x0220))
#       Logical device decodes 16 bit IO address lines
#             Minimum IO base address 0x0300
#             Maximum IO base address 0x0330
#             IO base alignment 48 bytes
#             Number of IO addresses required: 2
# (IO 1 (SIZE 2) (BASE 0x0300))

#       Start dependent functions: priority functional
#       IRQ 5, 7 or 10.
#             High true, edge sensitive interrupt (by default)
# (INT 0 (IRQ 5 (MODE +E)))
#       First DMA channel 0, 1 or 3.
#             8 bit DMA only
#             Logical device is not a bus master
#             DMA may execute in count by byte mode
#             DMA may not execute in count by word mode
#             DMA channel speed in compatible mode
# (DMA 0 (CHANNEL 0))
#       Next DMA channel 5, 6 or 7.
#             16 bit DMA only
#             Logical device is not a bus master
#             DMA may not execute in count by byte mode
#             DMA may execute in count by word mode
#             DMA channel speed in compatible mode
# (DMA 1 (CHANNEL 5))
#       Logical device decodes 16 bit IO address lines
#             Minimum IO base address 0x0220
#             Maximum IO base address 0x0280
#             IO base alignment 32 bytes
#             Number of IO addresses required: 16
# (IO 0 (SIZE 16) (BASE 0x0220))

#       Start dependent functions: priority functional
#       IRQ 5, 7 or 10.
#             High true, edge sensitive interrupt (by default)
# (INT 0 (IRQ 5 (MODE +E)))
#       First DMA channel 0, 1 or 3.
#             8 bit DMA only
#             Logical device is not a bus master
#             DMA may execute in count by byte mode
#             DMA may not execute in count by word mode
#             DMA channel speed in compatible mode
# (DMA 0 (CHANNEL 0))
#       Logical device decodes 16 bit IO address lines
#             Minimum IO base address 0x0220
#             Maximum IO base address 0x0280
#             IO base alignment 32 bytes
#             Number of IO addresses required: 16
# (IO 0 (SIZE 16) (BASE 0x0220))
#       Logical device decodes 16 bit IO address lines
#             Minimum IO base address 0x0300
#             Maximum IO base address 0x0330
#             IO base alignment 48 bytes
#             Number of IO addresses required: 2
# (IO 1 (SIZE 2) (BASE 0x0300))
#       Logical device decodes 16 bit IO address lines
#             Minimum IO base address 0x0388
#             Maximum IO base address 0x0388
#             IO base alignment 1 bytes
#             Number of IO addresses required: 4
# (IO 2 (SIZE 4) (BASE 0x0388))

#       Start dependent functions: priority functional
#       IRQ 5, 7 or 10.
#             High true, edge sensitive interrupt (by default)
# (INT 0 (IRQ 5 (MODE +E)))
#       First DMA channel 0, 1 or 3.
#             8 bit DMA only
#             Logical device is not a bus master
#             DMA may execute in count by byte mode
#             DMA may not execute in count by word mode
#             DMA channel speed in compatible mode
# (DMA 0 (CHANNEL 0))
#       Logical device decodes 16 bit IO address lines
#             Minimum IO base address 0x0220
#             Maximum IO base address 0x0280
#             IO base alignment 32 bytes
#             Number of IO addresses required: 16
# (IO 0 (SIZE 16) (BASE 0x0220))
#       Logical device decodes 16 bit IO address lines
#             Minimum IO base address 0x0300
#             Maximum IO base address 0x0330
#             IO base alignment 48 bytes
#             Number of IO addresses required: 2
# (IO 1 (SIZE 2) (BASE 0x0300))

#       Start dependent functions: priority functional
#       IRQ 5, 7, 10 or 11.
#             High true, edge sensitive interrupt (by default)
# (INT 0 (IRQ 5 (MODE +E)))
#       First DMA channel 0, 1 or 3.
#             8 bit DMA only
#             Logical device is not a bus master
#             DMA may execute in count by byte mode
#             DMA may not execute in count by word mode
#             DMA channel speed in compatible mode
# (DMA 0 (CHANNEL 0))
#       Logical device decodes 16 bit IO address lines
#             Minimum IO base address 0x0220
#             Maximum IO base address 0x0280
#             IO base alignment 32 bytes
#             Number of IO addresses required: 16
# (IO 0 (SIZE 16) (BASE 0x0220))

#     End dependent functions
 (NAME "CTL002b/1358042[0]{Audio               }")
# (ACT Y)
))
#
# Logical device id CTL2011
#     Device supports vendor reserved register @ 0x38
#     Device supports vendor reserved register @ 0x3a
#
# Edit the entries below to uncomment out the configuration required.
# Note that only the first value of any range is given, this may be
changed if required
# Don't forget to uncomment the activate (ACT Y) when happy

(CONFIGURE CTL002b/1358042 (LD 1
#     Compatible device id PNP0600
#     ANSI string -->IDE<--

# Multiple choice time, choose one only !

#     Start dependent functions: priority preferred
#       IRQ 10.
#             High true, edge sensitive interrupt (by default)
# (INT 0 (IRQ 10 (MODE +E)))
#       Logical device decodes 16 bit IO address lines
#             Minimum IO base address 0x0168
#             Maximum IO base address 0x0168
#             IO base alignment 1 bytes
#             Number of IO addresses required: 8
# (IO 0 (SIZE 8) (BASE 0x0168))
#       Logical device decodes 16 bit IO address lines
#             Minimum IO base address 0x036e
#             Maximum IO base address 0x036e
#             IO base alignment 1 bytes
#             Number of IO addresses required: 2
# (IO 1 (SIZE 2) (BASE 0x036e))

#       Start dependent functions: priority acceptable
#       IRQ 11.
#             High true, edge sensitive interrupt (by default)
# (INT 0 (IRQ 11 (MODE +E)))
#       Logical device decodes 16 bit IO address lines
#             Minimum IO base address 0x01e8
#             Maximum IO base address 0x01e8
#             IO base alignment 1 bytes
#             Number of IO addresses required: 8
# (IO 0 (SIZE 8) (BASE 0x01e8))
#       Logical device decodes 16 bit IO address lines
#             Minimum IO base address 0x03ee
#             Maximum IO base address 0x03ee
#             IO base alignment 1 bytes
#             Number of IO addresses required: 2
# (IO 1 (SIZE 2) (BASE 0x03ee))

#       Start dependent functions: priority acceptable
#       IRQ 10, 11 or 15.
#             High true, edge sensitive interrupt (by default)
# (INT 0 (IRQ 10 (MODE +E)))
#       Logical device decodes 16 bit IO address lines
#             Minimum IO base address 0x0180
#             Maximum IO base address 0x01b8
#             IO base alignment 8 bytes
#             Number of IO addresses required: 8
# (IO 0 (SIZE 8) (BASE 0x0180))
#       Logical device decodes 16 bit IO address lines
#             Minimum IO base address 0x0306
#             Maximum IO base address 0x033e
#             IO base alignment 8 bytes
#             Number of IO addresses required: 2
# (IO 1 (SIZE 2) (BASE 0x0306))

#       Start dependent functions: priority functional
#       IRQ 15.
#             High true, edge sensitive interrupt (by default)
# (INT 0 (IRQ 15 (MODE +E)))
#       Logical device decodes 16 bit IO address lines
#             Minimum IO base address 0x0170
#             Maximum IO base address 0x0170
#             IO base alignment 1 bytes
#             Number of IO addresses required: 8
# (IO 0 (SIZE 8) (BASE 0x0170))
#       Logical device decodes 16 bit IO address lines
#             Minimum IO base address 0x0376
#             Maximum IO base address 0x0376
#             IO base alignment 1 bytes
#             Number of IO addresses required: 1
# (IO 1 (SIZE 1) (BASE 0x0376))

#     End dependent functions
 (NAME "CTL002b/1358042[1]{IDE                 }")
# (ACT Y)
))
#
# Logical device id CTL0051
#     Device supports vendor reserved register @ 0x38
#     Device supports vendor reserved register @ 0x3a
#
# Edit the entries below to uncomment out the configuration required.
# Note that only the first value of any range is given, this may be
changed if required
# Don't forget to uncomment the activate (ACT Y) when happy

(CONFIGURE CTL002b/1358042 (LD 2
#     ANSI string -->StereoEnhance<--
#     Logical device decodes 16 bit IO address lines
#         Minimum IO base address 0x0100
#         Maximum IO base address 0x0138
#         IO base alignment 8 bytes
#         Number of IO addresses required: 1
# (IO 0 (SIZE 1) (BASE 0x0100))
 (NAME "CTL002b/1358042[2]{StereoEnhance       }")
# (ACT Y)
))
#
# Logical device id CTL7001
#     Device supports vendor reserved register @ 0x39
#     Device supports vendor reserved register @ 0x3a
#
# Edit the entries below to uncomment out the configuration required.
# Note that only the first value of any range is given, this may be
changed if required
# Don't forget to uncomment the activate (ACT Y) when happy

(CONFIGURE CTL002b/1358042 (LD 3
#     ANSI string -->Game<--
#     Logical device decodes 16 bit IO address lines
#         Minimum IO base address 0x0200
#         Maximum IO base address 0x0200
#         IO base alignment 1 bytes
#         Number of IO addresses required: 8
# (IO 0 (SIZE 8) (BASE 0x0200))
 (NAME "CTL002b/1358042[3]{Game                }")
# (ACT Y)
))
# End tag... Checksum 0x00 (OK)

# Returns all cards to the "Wait for Key" state
(WAITFORKEY)

thanks in advance for any help,
kervin

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