On Wed, Jan 28, 2009 at 12:08:32PM -0700, Paul Walmsley wrote: > When a non-CORE DPLL is enabled via omap3_noncore_dpll_enable(), use > the user's desired rate in clk->rate to determine whether to put the > DPLL into bypass or lock mode, rather than reading the DPLL's current > idle state from its hardware registers. > > This fixes a bug observed when leaving retention. Non-CORE DPLLs were > not being relocked when downstream clocks re-enabled; rather, the DPLL > entered bypass mode. > > Problem reported by Tero Kristo <tero.kri...@nokia.com>. > > linux-omap source commit is 8b1f0bd44fe490ec631230c8c040753a2bda8caa. > > Signed-off-by: Paul Walmsley <p...@pwsan.com> > Signed-off-by: Tony Lindgren <t...@atomide.com> > Cc: Tero Kristo <tero.kri...@nokia.com>
Patch 6 did it this way. Patch 7 changed it to use omap2_get_dpll_rate() and this patch changes it back. What's the point of submitting all this detail? It's just pure noise. Collapse these three patches into one please. -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
