> From: [email protected] [mailto:[email protected]]
> Sent: Wednesday, October 14, 2009 12:23 PM
> To: Woodruff, Richard; Premi, Sanjeev; [email protected]
> Subject: Re: RE: RE: RE: Memory performance / Cache problem

> > Yes aligned buffers can make a difference.  But probably more so for small
> > copies.  Of course you must touch the memory or mprotect() it so its
> > faulted in, but indications are you have done this.
>
> Mh, alignment (to an address) is done with malloc already. Probably you mean
> something different. I don't understand the difference. For me is
> malloc+memset=calloc.
> I'll send you the benchmark code, if you like.

Ok, if it compiles I could try on sdp3430 or sdp3630.

Alignment to a cache line is always best.  This is 64 bytes in A8.  Better yet, 
being 4K aligned is a good thing to reduce MMU effects.

> In both kernels I used the same rootfs (via NFS). Indeed I used CS2009q1 and
> its libs, but we are talking about factor 2..6. This must be something 
> serious.

2009 pay version has optimized thrumb2 and arm mode libraries you download 
separately.  I don't recall if free/lite version integrated this.

> What is your feeling? Does the 22 something strange or are the newer kernels
> slower that they have to be.

There are a lot of differences between 22 kernel and current ones.  First 
things I'd check would be around MMU settings, special ARM cp15 memory control 
regs, then omap memory and clock settings.  Also some bad device could undercut 
you.  Always good to cat /proc/interrupts and make sure something isn't spewing.

> Would be interesting to see results on other Omap3 boards with both old an new
> kernels.

I've not noticed anything on sdp on somewhat recent kernels.

Regards,
Richard W.

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