Adding debug to bootargs
( Kernel command line: mem=128M console=ttyS2,115200n8 noinitrd
root=/dev/mtdblock6 rw rootfstype=jffs2 debug
ip=192.168.90.101:192.168.90.230:192.168.90.1:255.255.255.0::eth0:on
mac=00:19:6f:cc:cc:dd )
doesn't change the output. Do I need a recompile with some kernel config params?
I found some CPU_FREQ_DEBUG , DEBUG_LL PM_DEBUG, OMAP_LL_DEBUG_NONE,
DEBUG_KERNEL , DEBUG_INFO which might be involved.
The frequencies the board is running are 12MHz crystal, 322MHz (or
166MHz core) and 600MHz MPU.
Sounds not unusual to me (maybe the 600MHz is not as standard as 550MHz).
I also found this in clock34xx_data.c
/* REVISIT: Not yet ready for OMAP3 */
#if 0
/* Check the MPU rate set by bootloader */
clkrate = omap2_get_dpll_rate_24xx(&dpll_ck);
for (prcm = rate_table; prcm->mpu_speed; prcm++) {
if (!(prcm->flags & cpu_mask))
continue;
if (prcm->xtal_speed != sys_ck.rate)
continue;
if (prcm->dpll_speed <= clkrate)
break;
}
curr_prcm_set = prcm;
#endif
2010/7/16 Gadiyar, Anand <[email protected]>:
>> Thanks Anand,
>> I don't have any USB working on the board.
>> If this only for this USB - is it save to comment that out?
>>
>
> If you're not using EHCI/OHCI, it ought to be safe to comment
> it out.
>
> My best guess is that you are using some non-standard frequencies
> and you've made changes to the code/bootloader that cause this
> path to not be able to find a good value to program in the DPLL
> configuration registers.
>
> Quite possibly, this is also the cause of your other problems.
> Can you explain what you are doing so we understand the issue
> better?
>
> - Anand
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