From: Geert Uytterhoeven <geert+rene...@glider.be>

Enable the performance monitor unit for the Cortex-A53 cores on the
R8A7795 SoC.

Extracted from a patch by Takeshi Kihara in the BSP.

Signed-off-by: Geert Uytterhoeven <geert+rene...@glider.be>
Signed-off-by: Simon Horman <horms+rene...@verge.net.au>
---
 arch/arm64/boot/dts/renesas/r8a7795.dtsi | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi 
b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index 61830697e33c..3573872974e0 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -340,6 +340,18 @@
                                             <&a57_3>;
                };
 
+               pmu_a53 {
+                       compatible = "arm,cortex-a53-pmu";
+                       interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-affinity = <&a53_0>,
+                                            <&a53_1>,
+                                            <&a53_2>,
+                                            <&a53_3>;
+               };
+
                timer {
                        compatible = "arm,armv8-timer";
                        interrupts = <GIC_PPI 13
-- 
2.7.0.rc3.207.g0ac5344

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