Add the EtherAVB pin groups to the R8A77970 PFC driver.

Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>

---
The patch is against the 'sh-pfc' branch of Geert's 'renesas-drivers.git' repo.

 drivers/pinctrl/sh-pfc/pfc-r8a77970.c |   98 ++++++++++++++++++++++++++++++++++
 1 file changed, 98 insertions(+)

Index: renesas-drivers/drivers/pinctrl/sh-pfc/pfc-r8a77970.c
===================================================================
--- renesas-drivers.orig/drivers/pinctrl/sh-pfc/pfc-r8a77970.c
+++ renesas-drivers/drivers/pinctrl/sh-pfc/pfc-r8a77970.c
@@ -728,6 +728,82 @@ static const struct sh_pfc_pin pinmux_pi
        PINMUX_GPIO_GP_ALL(),
 };
 
+/* - AVB0 ------------------------------------------------------------------- 
*/
+static const unsigned int avb0_link_pins[] = {
+       /* AVB0_LINK */
+       RCAR_GP_PIN(1, 18),
+};
+static const unsigned int avb0_link_mux[] = {
+       AVB0_LINK_MARK,
+};
+static const unsigned int avb0_magic_pins[] = {
+       /* AVB0_MAGIC */
+       RCAR_GP_PIN(1, 16),
+};
+static const unsigned int avb0_magic_mux[] = {
+       AVB0_MAGIC_MARK,
+};
+static const unsigned int avb0_phy_int_pins[] = {
+       /* AVB0_PHY_INT */
+       RCAR_GP_PIN(1, 17),
+};
+static const unsigned int avb0_phy_int_mux[] = {
+       AVB0_PHY_INT_MARK,
+};
+static const unsigned int avb0_mdio_pins[] = {
+       /* AVB0_MDC, AVB0_MDIO */
+       RCAR_GP_PIN(1, 15), RCAR_GP_PIN(1, 14),
+};
+static const unsigned int avb0_mdio_mux[] = {
+       AVB0_MDC_MARK, AVB0_MDIO_MARK,
+};
+static const unsigned int avb0_rgmii_pins[] = {
+       /*
+        * AVB0_TX_CTL, AVB0_TXC, AVB0_TD0, AVB0_TD1, AVB0_TD2, AVB0_TD3,
+        * AVB0_RX_CTL, AVB0_RXC, AVB0_RD0, AVB0_RD1, AVB0_RD2, AVB0_RD3
+        */
+       RCAR_GP_PIN(1, 7), RCAR_GP_PIN(1, 8),
+       RCAR_GP_PIN(1, 9), RCAR_GP_PIN(1, 10),
+       RCAR_GP_PIN(1, 11), RCAR_GP_PIN(1, 12),
+       RCAR_GP_PIN(1, 1), RCAR_GP_PIN(1, 2),
+       RCAR_GP_PIN(1, 3), RCAR_GP_PIN(1, 4),
+       RCAR_GP_PIN(1, 5), RCAR_GP_PIN(1, 6),
+};
+static const unsigned int avb0_rgmii_mux[] = {
+       AVB0_TX_CTL_MARK, AVB0_TXC_MARK,
+       AVB0_TD0_MARK, AVB0_TD1_MARK, AVB0_TD2_MARK, AVB0_TD3_MARK,
+       AVB0_RX_CTL_MARK, AVB0_RXC_MARK,
+       AVB0_RD0_MARK, AVB0_RD1_MARK, AVB0_RD2_MARK, AVB0_RD3_MARK,
+};
+static const unsigned int avb0_txcrefclk_pins[] = {
+       /* AVB0_TXCREFCLK */
+       RCAR_GP_PIN(1, 13),
+};
+static const unsigned int avb0_txcrefclk_mux[] = {
+       AVB0_TXCREFCLK_MARK,
+};
+static const unsigned int avb0_avtp_pps_pins[] = {
+       /* AVB0_AVTP_PPS */
+       RCAR_GP_PIN(2, 6),
+};
+static const unsigned int avb0_avtp_pps_mux[] = {
+       AVB0_AVTP_PPS_MARK,
+};
+static const unsigned int avb0_avtp_capture_pins[] = {
+       /* AVB0_AVTP_CAPTURE */
+       RCAR_GP_PIN(1, 20),
+};
+static const unsigned int avb0_avtp_capture_mux[] = {
+       AVB0_AVTP_CAPTURE_MARK,
+};
+static const unsigned int avb0_avtp_match_pins[] = {
+       /* AVB0_AVTP_MATCH */
+       RCAR_GP_PIN(1, 19),
+};
+static const unsigned int avb0_avtp_match_mux[] = {
+       AVB0_AVTP_MATCH_MARK,
+};
+
 /* - CANFD Clock ------------------------------------------------------------ 
*/
 static const unsigned int canfd_clk_a_pins[] = {
        /* CANFD_CLK */
@@ -1599,6 +1675,15 @@ static const unsigned int vin1_clk_mux[]
 };
 
 static const struct sh_pfc_pin_group pinmux_groups[] = {
+       SH_PFC_PIN_GROUP(avb0_link),
+       SH_PFC_PIN_GROUP(avb0_magic),
+       SH_PFC_PIN_GROUP(avb0_phy_int),
+       SH_PFC_PIN_GROUP(avb0_mdio),
+       SH_PFC_PIN_GROUP(avb0_rgmii),
+       SH_PFC_PIN_GROUP(avb0_txcrefclk),
+       SH_PFC_PIN_GROUP(avb0_avtp_pps),
+       SH_PFC_PIN_GROUP(avb0_avtp_capture),
+       SH_PFC_PIN_GROUP(avb0_avtp_match),
        SH_PFC_PIN_GROUP(canfd_clk_a),
        SH_PFC_PIN_GROUP(canfd_clk_b),
        SH_PFC_PIN_GROUP(canfd0_data_a),
@@ -1709,6 +1794,18 @@ static const struct sh_pfc_pin_group pin
        SH_PFC_PIN_GROUP(vin1_clk),
 };
 
+static const char * const avb0_groups[] = {
+       "avb0_link",
+       "avb0_magic",
+       "avb0_phy_int",
+       "avb0_mdio",
+       "avb0_rgmii",
+       "avb0_txcrefclk",
+       "avb0_avtp_pps",
+       "avb0_avtp_capture",
+       "avb0_avtp_match",
+};
+
 static const char * const canfd_clk_groups[] = {
        "canfd_clk_a",
        "canfd_clk_b",
@@ -1914,6 +2011,7 @@ static const char * const vin1_groups[]
 };
 
 static const struct sh_pfc_function pinmux_functions[] = {
+       SH_PFC_FUNCTION(avb0),
        SH_PFC_FUNCTION(canfd_clk),
        SH_PFC_FUNCTION(canfd0),
        SH_PFC_FUNCTION(canfd1),

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