On Sun, Dec 20, 1998 at 09:48:01PM +0000, Peter Watkinson wrote:
>
> Hi,
>
> Does anyone know if Backplane motherboards with cpu cards can be used
> for smp??
In the sesnse that there are dual- and quad-processor
CPU cards for passive backplanes, yes, but only in
the same way that they would if the chipsets and the
CPUs were on the system planer board rather than on a
daughterboard. PICMG systems, which use a PCI and ISA
backplane with attachements to both busses from the CPU
card, often have what look like two CPU board slots,
but I don't think that any daughterboards support what
you are looking for; rather, I think that they are
designed more for things like quad-CPU daughter boards
that need two slots to support all the memory & I/O,
and for redudant CPU failover configurations. There are
multi-processor specifications for STD bus systems,
but you will be hard-pressed to find much more than
a P54C-based STD-bus board, and the STD bus itself is
a 16-bit ISA reimplementation, while STD-32 is an EISA
architecture, so the bandwidth would be quite limited. I
don't beleive that the multiprocessing capabilities of
these boards have been exploited outside of various RTOS
system, but I could be wrong. There are LAN-over-VME
implementations that will allow you to implent somthing
like a Beowulf cluster in a card cage, but VME boards can
be quite expensive and such a solution is not likely to be
cost-effective. I know that there are several labs working
on LAN-over-CompactPCI implementations, but again this
will almost certainly have to be a LAN architecture rather
than a MP architecture with a single OS scheduler. Some of
these things are starting to see light... see for example
http://www.ziatech.com/compactnet.htm.
--Bob
--
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Bob Drzyzgula It's not a problem
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