Add definitions for pull-up/downs, and several pin functions used by various drivers, such as gmac, i2c, and mmc.
Signed-off-by: Chen-Yu Tsai <[email protected]> --- arch/arm/include/asm/arch-sunxi/gpio.h | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/arm/include/asm/arch-sunxi/gpio.h b/arch/arm/include/asm/arch-sunxi/gpio.h index d5a01d8..c25d4bd 100644 --- a/arch/arm/include/asm/arch-sunxi/gpio.h +++ b/arch/arm/include/asm/arch-sunxi/gpio.h @@ -105,6 +105,7 @@ enum sunxi_gpio_number { #define SUNXI_GPA0_ERXD3 2 #define SUNXI_GPA0_SPI1_CS0 3 #define SUNXI_GPA0_UART2_RTS 4 +#define SUN7I_GPA0_GRXD3 5 #define SUNXI_GPA1_ERXD2 2 #define SUNXI_GPA1_SPI1_CLK 3 @@ -117,6 +118,8 @@ enum sunxi_gpio_number { #define SUNXI_GPA10_UART1_TX 4 #define SUNXI_GPA11_UART1_RX 4 +#define SUNXI_GPB0_TWI0_SCK 2 + #define SUN4I_GPB22_UART0_TX 2 #define SUN4I_GPB23_UART0_RX 2 @@ -147,12 +150,25 @@ enum sunxi_gpio_number { #define SUNXI_GPC11_NDQ3 2 #define SUNXI_GPC11_SDC2_D3 3 +#define SUNXI_GPF0_SDC0_CMD 2 + #define SUNXI_GPF2_SDC0_CLK 2 #define SUNXI_GPF2_UART0_TX 4 #define SUNXI_GPF4_SDC0_D3 2 #define SUNXI_GPF4_UART0_RX 4 +#define SUN4I_GPG0_SDC1_CMD 4 + +#define SUN4I_GPH22_SDC1_CMD 5 + +#define SUN4I_GPI4_SDC3_CMD 2 + +/* GPIO pin pull-up/down config */ +#define SUNXI_GPIO_PULL_DISABLE 0 +#define SUNXI_GPIO_PULL_UP 1 +#define SUNXI_GPIO_PULL_DOWN 2 + int sunxi_gpio_set_cfgpin(u32 pin, u32 val); int sunxi_gpio_get_cfgpin(u32 pin); int sunxi_gpio_set_drv(u32 pin, u32 val); -- 1.9.0 -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. For more options, visit https://groups.google.com/d/optout.
