On Mon, Mar 17, 2014 at 4:28 PM, Ian Campbell <[email protected]> wrote: > On Mon, 2014-03-17 at 12:05 +0800, Chen-Yu Tsai wrote: >> @@ -162,40 +151,47 @@ static int mmc_clk_io_on(int sdc_no) >> switch (sdc_no) { >> case 0: >> /* D1-PF0, D0-PF1, CLK-PF2, CMD-PF3, D3-PF4, D4-PF5 */ >> - writel(0x222222, &gpio_f->cfg[0]); >> - writel(0x555, &gpio_f->pull[0]); >> - writel(0xaaa, &gpio_f->drv[0]); >> + for (pin = SUNXI_GPF(0); pin <= SUNXI_GPF(5); pin++) { >> + sunxi_gpio_set_cfgpin(pin, SUNXI_GPF0_SDC0_CMD); > > I appreciate that the function is the same for each pin but this still > looks odd. Perhaps just #define SUNXI_GPFx_SDC0 and use that?
I was matching what was already defined, but yeah, that looks better. Maybe we should change the other existing one as well? I'm referring to the whole patch series, and the ones already in gpio.h. > I did something similar yesterday and just opencoded the calls. > >> + sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); >> + sunxi_gpio_set_drv(pin, 2); > > I was wondering about these -- do these matter even when the PIN is > configured for a specific function and not as a GPIO? The pull-up/downs and drive strength are valid regardless whether the PIN is used for GPIO (input/output). IIRC, most boards have external pull-ups for MMC, so sunxi_gpio_set_pull can be dropped. Drive strength must be set for MMC to work reliably. This was tested by Hans for the kernel DTs. Cheers, ChenYu -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. For more options, visit https://groups.google.com/d/optout.
