Signed-off-by: Hans de Goede <[email protected]>
---
arch/arm/cpu/armv7/sunxi/pinmux.c | 12 ++++--------
arch/arm/include/asm/arch-sunxi/gpio.h | 19 ++++++++++++++++++-
drivers/gpio/sunxi_gpio.c | 6 ++----
3 files changed, 24 insertions(+), 13 deletions(-)
diff --git a/arch/arm/cpu/armv7/sunxi/pinmux.c
b/arch/arm/cpu/armv7/sunxi/pinmux.c
index 832545f..3fdd337 100644
--- a/arch/arm/cpu/armv7/sunxi/pinmux.c
+++ b/arch/arm/cpu/armv7/sunxi/pinmux.c
@@ -15,8 +15,7 @@ int sunxi_gpio_set_cfgpin(u32 pin, u32 val)
u32 bank = GPIO_BANK(pin);
u32 index = GPIO_CFG_INDEX(pin);
u32 offset = GPIO_CFG_OFFSET(pin);
- struct sunxi_gpio *pio =
- &((struct sunxi_gpio_reg *)SUNXI_PIO_BASE)->gpio_bank[bank];
+ struct sunxi_gpio *pio = BANK_TO_GPIO(bank);
clrsetbits_le32(&pio->cfg[0] + index, 0xf << offset, val << offset);
@@ -29,8 +28,7 @@ int sunxi_gpio_get_cfgpin(u32 pin)
u32 bank = GPIO_BANK(pin);
u32 index = GPIO_CFG_INDEX(pin);
u32 offset = GPIO_CFG_OFFSET(pin);
- struct sunxi_gpio *pio =
- &((struct sunxi_gpio_reg *)SUNXI_PIO_BASE)->gpio_bank[bank];
+ struct sunxi_gpio *pio = BANK_TO_GPIO(bank);
cfg = readl(&pio->cfg[0] + index);
cfg >>= offset;
@@ -43,8 +41,7 @@ int sunxi_gpio_set_drv(u32 pin, u32 val)
u32 bank = GPIO_BANK(pin);
u32 index = GPIO_DRV_INDEX(pin);
u32 offset = GPIO_DRV_OFFSET(pin);
- struct sunxi_gpio *pio =
- &((struct sunxi_gpio_reg *)SUNXI_PIO_BASE)->gpio_bank[bank];
+ struct sunxi_gpio *pio = BANK_TO_GPIO(bank);
clrsetbits_le32(&pio->drv[0] + index, 0x3 << offset, val);
@@ -56,8 +53,7 @@ int sunxi_gpio_set_pull(u32 pin, u32 val)
u32 bank = GPIO_BANK(pin);
u32 index = GPIO_PULL_INDEX(pin);
u32 offset = GPIO_PULL_OFFSET(pin);
- struct sunxi_gpio *pio =
- &((struct sunxi_gpio_reg *)SUNXI_PIO_BASE)->gpio_bank[bank];
+ struct sunxi_gpio *pio = BANK_TO_GPIO(bank);
clrsetbits_le32(&pio->pull[0] + index, 0x3 << offset, offset);
diff --git a/arch/arm/include/asm/arch-sunxi/gpio.h
b/arch/arm/include/asm/arch-sunxi/gpio.h
index c368adb..00326a4 100644
--- a/arch/arm/include/asm/arch-sunxi/gpio.h
+++ b/arch/arm/include/asm/arch-sunxi/gpio.h
@@ -10,6 +10,7 @@
#define _SUNXI_GPIO_H
#include <linux/types.h>
+#include <asm/arch/cpu.h>
/*
* sunxi has 9 banks of gpio, they are:
@@ -27,6 +28,15 @@
#define SUNXI_GPIO_G 6
#define SUNXI_GPIO_H 7
#define SUNXI_GPIO_I 8
+#define SUNXI_GPIO_BANKS 9
+
+/*
+ * sun6i has atleast 1 additional bank, note banks J K don't exist!
+ * PL0 - PL1 at the very least is known.
+ *
+ * Note this bank is at a different register offset!
+ */
+#define SUNXI_GPIO_L 9
struct sunxi_gpio {
u32 cfg[4];
@@ -44,11 +54,15 @@ struct sunxi_gpio_int {
};
struct sunxi_gpio_reg {
- struct sunxi_gpio gpio_bank[9];
+ struct sunxi_gpio gpio_bank[SUNXI_GPIO_BANKS];
u8 res[0xbc];
struct sunxi_gpio_int gpio_int;
};
+#define BANK_TO_GPIO(bank) (((bank) < SUNXI_GPIO_BANKS) ? \
+ &((struct sunxi_gpio_reg *)SUNXI_PIO_BASE)->gpio_bank[bank] : \
+ (struct sunxi_gpio *)SUNXI_R_PIO_BASE)
+
#define GPIO_BANK(pin) ((pin) >> 5)
#define GPIO_NUM(pin) ((pin) & 0x1f)
@@ -71,6 +85,7 @@ struct sunxi_gpio_reg {
#define SUNXI_GPIO_G_NR 32
#define SUNXI_GPIO_H_NR 32
#define SUNXI_GPIO_I_NR 32
+#define SUNXI_GPIO_L_NR 32
#define SUNXI_GPIO_NEXT(__gpio) \
((__gpio##_START) + (__gpio##_NR) + 0)
@@ -85,6 +100,7 @@ enum sunxi_gpio_number {
SUNXI_GPIO_G_START = SUNXI_GPIO_NEXT(SUNXI_GPIO_F),
SUNXI_GPIO_H_START = SUNXI_GPIO_NEXT(SUNXI_GPIO_G),
SUNXI_GPIO_I_START = SUNXI_GPIO_NEXT(SUNXI_GPIO_H),
+ SUNXI_GPIO_L_START = SUNXI_GPIO_NEXT(SUNXI_GPIO_I),
};
/* SUNXI GPIO number definitions */
@@ -97,6 +113,7 @@ enum sunxi_gpio_number {
#define SUNXI_GPG(_nr) (SUNXI_GPIO_G_START + (_nr))
#define SUNXI_GPH(_nr) (SUNXI_GPIO_H_START + (_nr))
#define SUNXI_GPI(_nr) (SUNXI_GPIO_I_START + (_nr))
+#define SUNXI_GPL(_nr) (SUNXI_GPIO_L_START + (_nr))
/* GPIO pin function config */
#define SUNXI_GPIO_INPUT 0
diff --git a/drivers/gpio/sunxi_gpio.c b/drivers/gpio/sunxi_gpio.c
index 5434da1..0c50a8f 100644
--- a/drivers/gpio/sunxi_gpio.c
+++ b/drivers/gpio/sunxi_gpio.c
@@ -19,8 +19,7 @@ static int sunxi_gpio_output(u32 pin, u32 val)
u32 dat;
u32 bank = GPIO_BANK(pin);
u32 num = GPIO_NUM(pin);
- struct sunxi_gpio *pio =
- &((struct sunxi_gpio_reg *)SUNXI_PIO_BASE)->gpio_bank[bank];
+ struct sunxi_gpio *pio = BANK_TO_GPIO(bank);
dat = readl(&pio->dat);
if (val)
@@ -38,8 +37,7 @@ static int sunxi_gpio_input(u32 pin)
u32 dat;
u32 bank = GPIO_BANK(pin);
u32 num = GPIO_NUM(pin);
- struct sunxi_gpio *pio =
- &((struct sunxi_gpio_reg *)SUNXI_PIO_BASE)->gpio_bank[bank];
+ struct sunxi_gpio *pio = BANK_TO_GPIO(bank);
dat = readl(&pio->dat);
dat >>= num;
--
1.9.0
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