While testing the eMMC access in a Banana Pi M3, I found and fixed some problems: - the driver was trying to set a strange rate when clk_round_rate() was returning an error - the 'new timing mode' could not work because a register was not set - with a parent clock at 1.2GHz, the output and sample phases were not correct for the A83T
Jean-Francois Moine (3): mmc: sunxi: Check the value returned by clk_round_rate mmc: sunxi: Set the 'New Timing' register for 8 bits DDR transfers mmc: sunxi: Add support to the Allwinner A83T drivers/mmc/host/sunxi-mmc.c | 45 +++++++++++++++++++++++++++++++++++--------- 1 file changed, 38 insertions(+), 7 deletions(-) -- 2.9.2 -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. For more options, visit https://groups.google.com/d/optout.
