This patch-set adds new pci controller event and LTSSM tracepoint used by host
drivers
which provide LTSSM trace functionality. The first user is pcie-dw-rockchip
with a 256
Bytes FIFO for recording LTSSM transition.
Testing
=========
This series was tested on RK3588/RK3588s EVB1 with NVMe SSD connected to PCIe3
and PCIe2
root ports.
echo 1 >
/sys/kernel/debug/tracing/events/pci_controller/pcie_ltssm_state_transition/enable
cat /sys/kernel/debug/tracing/trace_pipe
# tracer: nop
#
# entries-in-buffer/entries-written: 64/64 #P:8
#
# _-----=> irqs-off/BH-disabled
# / _----=> need-resched
# | / _---=> hardirq/softirq
# || / _--=> preempt-depth
# ||| / _-=> migrate-disable
# |||| / delay
# TASK-PID CPU# ||||| TIMESTAMP FUNCTION
# | | | ||||| | |
kworker/0:0-9 [000] ..... 5.600194:
pcie_ltssm_state_transition: dev: a40000000.pcie state: DETECT_ACT rate: Unknown
kworker/0:0-9 [000] ..... 5.600198:
pcie_ltssm_state_transition: dev: a40000000.pcie state: DETECT_WAIT rate:
Unknown
kworker/0:0-9 [000] ..... 5.600199:
pcie_ltssm_state_transition: dev: a40000000.pcie state: DETECT_ACT rate: Unknown
kworker/0:0-9 [000] ..... 5.600201:
pcie_ltssm_state_transition: dev: a40000000.pcie state: POLL_ACTIVE rate:
Unknown
kworker/0:0-9 [000] ..... 5.600202:
pcie_ltssm_state_transition: dev: a40000000.pcie state: POLL_CONFIG rate:
Unknown
kworker/0:0-9 [000] ..... 5.600204:
pcie_ltssm_state_transition: dev: a40000000.pcie state: CFG_LINKWD_START rate:
Unknown
kworker/0:0-9 [000] ..... 5.600206:
pcie_ltssm_state_transition: dev: a40000000.pcie state: CFG_LINKWD_ACEPT rate:
Unknown
kworker/0:0-9 [000] ..... 5.600207:
pcie_ltssm_state_transition: dev: a40000000.pcie state: CFG_LANENUM_WAI rate:
Unknown
kworker/0:0-9 [000] ..... 5.600208:
pcie_ltssm_state_transition: dev: a40000000.pcie state: CFG_LANENUM_ACEPT rate:
Unknown
kworker/0:0-9 [000] ..... 5.600210:
pcie_ltssm_state_transition: dev: a40000000.pcie state: CFG_COMPLETE rate:
Unknown
kworker/0:0-9 [000] ..... 5.600212:
pcie_ltssm_state_transition: dev: a40000000.pcie state: CFG_IDLE rate: Unknown
kworker/0:0-9 [000] ..... 5.600213:
pcie_ltssm_state_transition: dev: a40000000.pcie state: L0 rate: 2.5 GT/s
kworker/0:0-9 [000] ..... 5.600214:
pcie_ltssm_state_transition: dev: a40000000.pcie state: RCVRY_LOCK rate: Unknown
kworker/0:0-9 [000] ..... 5.600216:
pcie_ltssm_state_transition: dev: a40000000.pcie state: RCVRY_RCVRCFG rate:
Unknown
kworker/0:0-9 [000] ..... 5.600217:
pcie_ltssm_state_transition: dev: a40000000.pcie state: RCVRY_SPEED rate:
Unknown
kworker/0:0-9 [000] ..... 5.600218:
pcie_ltssm_state_transition: dev: a40000000.pcie state: RCVRY_LOCK rate: Unknown
kworker/0:0-9 [000] ..... 5.600220:
pcie_ltssm_state_transition: dev: a40000000.pcie state: RCVRY_EQ1 rate: Unknown
kworker/0:0-9 [000] ..... 5.600221:
pcie_ltssm_state_transition: dev: a40000000.pcie state: RCVRY_EQ2 rate: 8.0 GT/s
kworker/0:0-9 [000] ..... 5.600222:
pcie_ltssm_state_transition: dev: a40000000.pcie state: RCVRY_EQ3 rate: 8.0 GT/s
kworker/0:0-9 [000] ..... 5.600224:
pcie_ltssm_state_transition: dev: a40000000.pcie state: RCVRY_LOCK rate: 8.0
GT/s
kworker/0:0-9 [000] ..... 5.600225:
pcie_ltssm_state_transition: dev: a40000000.pcie state: RCVRY_RCVRCFG rate: 8.0
GT/s
kworker/0:0-9 [000] ..... 5.600226:
pcie_ltssm_state_transition: dev: a40000000.pcie state: RCVRY_IDLE rate: 8.0
GT/s
kworker/0:0-9 [000] ..... 5.600227:
pcie_ltssm_state_transition: dev: a40000000.pcie state: L0 rate: 8.0 GT/s
kworker/0:0-9 [000] ..... 5.600228:
pcie_ltssm_state_transition: dev: a40000000.pcie state: RCVRY_LOCK rate: 8.0
GT/s
kworker/0:0-9 [000] ..... 5.600229:
pcie_ltssm_state_transition: dev: a40000000.pcie state: RCVRY_RCVRCFG rate: 8.0
GT/s
kworker/0:0-9 [000] ..... 5.600231:
pcie_ltssm_state_transition: dev: a40000000.pcie state: RCVRY_IDLE rate: 8.0
GT/s
kworker/0:0-9 [000] ..... 5.600232:
pcie_ltssm_state_transition: dev: a40000000.pcie state: L0 rate: 8.0 GT/s
kworker/0:0-9 [000] ..... 5.600233:
pcie_ltssm_state_transition: dev: a40000000.pcie state: L123_SEND_EIDLE rate:
8.0 GT/s
kworker/0:0-9 [000] ..... 5.600234:
pcie_ltssm_state_transition: dev: a40000000.pcie state: L1_IDLE rate: 8.0 GT/s
kworker/0:0-9 [000] ..... 5.600236:
pcie_ltssm_state_transition: dev: a40000000.pcie state: RCVRY_LOCK rate: 8.0
GT/s
kworker/0:0-9 [000] ..... 5.600237:
pcie_ltssm_state_transition: dev: a40000000.pcie state: RCVRY_RCVRCFG rate: 8.0
GT/s
kworker/0:0-9 [000] ..... 5.600238:
pcie_ltssm_state_transition: dev: a40000000.pcie state: RCVRY_IDLE rate: 8.0
GT/s
kworker/0:0-9 [000] ..... 5.600239:
pcie_ltssm_state_transition: dev: a40000000.pcie state: L0 rate: 8.0 GT/s
Changes in v4:
- use TRACE_EVENT_FN to notify when to start and stop the tracepoint,
and export pci_ltssm_tp_enabled() for host drivers to use
- skip trace if pci_ltssm_tp_enabled() is false.(Steven)
- wrap into 80 columns(Bjorn)
Changes in v3:
- add TRACE_DEFINE_ENUM for all enums(Steven Rostedt)
- Add toctree entry in Documentation/trace/index.rst(Bagas Sanjaya)
- fix mismatch section underline length(Bagas Sanjaya)
- Make example snippets in code block(Bagas Sanjaya)
- warp context into 80 columns and fix the file name(Bjorn)
- reorder variables(Mani)
- rename loop to i; rename en to enable(Mani)
- use FIELD_GET(Mani)
- add comment about how the FIFO works(Mani)
Changes in v2:
- use tracepoint
Shawn Lin (3):
PCI: trace: Add PCI controller LTSSM transition tracepoint
Documentation: tracing: Add PCI controller event documentation
PCI: dw-rockchip: Add pcie_ltssm_state_transition trace support
Documentation/trace/events-pci-controller.rst | 42 ++++++++++
Documentation/trace/index.rst | 1 +
drivers/pci/controller/dwc/pcie-dw-rockchip.c | 111 ++++++++++++++++++++++++++
drivers/pci/trace.c | 20 +++++
include/linux/pci.h | 4 +
include/trace/events/pci_controller.h | 57 +++++++++++++
6 files changed, 235 insertions(+)
create mode 100644 Documentation/trace/events-pci-controller.rst
create mode 100644 include/trace/events/pci_controller.h
--
2.7.4
