Add the trace calls as well as retrieving the number of clock cycles for the rockchip_vpu core.
Signed-off-by: Detlev Casanova <[email protected]> --- drivers/media/platform/verisilicon/hantro.h | 1 + drivers/media/platform/verisilicon/hantro_drv.c | 10 ++++++++++ .../media/platform/verisilicon/rockchip_vpu981_regs.h | 1 + drivers/media/platform/verisilicon/rockchip_vpu_hw.c | 4 ++++ 4 files changed, 16 insertions(+) diff --git a/drivers/media/platform/verisilicon/hantro.h b/drivers/media/platform/verisilicon/hantro.h index 0353de154a1e..d5cddc783688 100644 --- a/drivers/media/platform/verisilicon/hantro.h +++ b/drivers/media/platform/verisilicon/hantro.h @@ -253,6 +253,7 @@ struct hantro_ctx { u32 sequence_cap; u32 sequence_out; + u32 hw_cycles; const struct hantro_fmt *vpu_src_fmt; struct v4l2_pix_format_mplane src_fmt; diff --git a/drivers/media/platform/verisilicon/hantro_drv.c b/drivers/media/platform/verisilicon/hantro_drv.c index 94f58f4e4a4e..8dd26ca32459 100644 --- a/drivers/media/platform/verisilicon/hantro_drv.c +++ b/drivers/media/platform/verisilicon/hantro_drv.c @@ -25,6 +25,8 @@ #include <media/videobuf2-core.h> #include <media/videobuf2-vmalloc.h> +#include <trace/events/v4l2.h> + #include "hantro_v4l2.h" #include "hantro.h" #include "hantro_hw.h" @@ -103,6 +105,9 @@ void hantro_irq_done(struct hantro_dev *vpu, struct hantro_ctx *ctx = v4l2_m2m_get_curr_priv(vpu->m2m_dev); + if (ctx) + trace_v4l2_hw_done(ctx->fh.tgid, ctx->fh.fd, ctx->hw_cycles); + /* * If cancel_delayed_work returns false * the timeout expired. The watchdog is running, @@ -125,6 +130,9 @@ void hantro_watchdog(struct work_struct *work) ctx = v4l2_m2m_get_curr_priv(vpu->m2m_dev); if (ctx) { vpu_err("frame processing timed out!\n"); + + trace_v4l2_hw_done(ctx->fh.tgid, ctx->fh.fd, ctx->hw_cycles); + if (ctx->codec_ops->reset) ctx->codec_ops->reset(ctx); hantro_job_finish(vpu, ctx, VB2_BUF_STATE_ERROR); @@ -189,6 +197,8 @@ static void device_run(void *priv) if (ctx->codec_ops->run(ctx)) goto err_cancel_job; + trace_v4l2_hw_run(ctx->fh.tgid, ctx->fh.fd); + return; err_cancel_job: diff --git a/drivers/media/platform/verisilicon/rockchip_vpu981_regs.h b/drivers/media/platform/verisilicon/rockchip_vpu981_regs.h index e4008da64f19..96b85470208b 100644 --- a/drivers/media/platform/verisilicon/rockchip_vpu981_regs.h +++ b/drivers/media/platform/verisilicon/rockchip_vpu981_regs.h @@ -451,6 +451,7 @@ #define av1_pp0_dup_ver AV1_DEC_REG(394, 16, 0xff) #define av1_pp0_dup_hor AV1_DEC_REG(394, 24, 0xff) +#define AV1_CYCLE_COUNT (AV1_SWREG(63)) #define AV1_TILE_OUT_LU (AV1_SWREG(65)) #define AV1_REFERENCE_Y(i) (AV1_SWREG(67) + ((i) * 0x8)) #define AV1_SEGMENTATION (AV1_SWREG(81)) diff --git a/drivers/media/platform/verisilicon/rockchip_vpu_hw.c b/drivers/media/platform/verisilicon/rockchip_vpu_hw.c index 02673be9878e..f959151b6645 100644 --- a/drivers/media/platform/verisilicon/rockchip_vpu_hw.c +++ b/drivers/media/platform/verisilicon/rockchip_vpu_hw.c @@ -424,6 +424,8 @@ static irqreturn_t rk3588_vpu981_irq(int irq, void *dev_id) { struct hantro_dev *vpu = dev_id; enum vb2_buffer_state state; + struct hantro_ctx *ctx = + v4l2_m2m_get_curr_priv(vpu->m2m_dev); u32 status; status = vdpu_read(vpu, AV1_REG_INTERRUPT); @@ -433,6 +435,8 @@ static irqreturn_t rk3588_vpu981_irq(int irq, void *dev_id) vdpu_write(vpu, 0, AV1_REG_INTERRUPT); vdpu_write(vpu, AV1_REG_CONFIG_DEC_CLK_GATE_E, AV1_REG_CONFIG); + ctx->hw_cycles = vdpu_read(vpu, AV1_CYCLE_COUNT); + hantro_irq_done(vpu, state); return IRQ_HANDLED; -- 2.53.0
