On Mon, Oct 19, 2026 at 4:00 PM Steven Rostedt <[email protected]> wrote: > > On Sun, 18 Oct 2026 13:14:59 +0200 > Roman 'Hedin' Storozhenko <[email protected]> wrote: > > > arch/riscv/include/asm/riscv_tlb.h | 103 > > +++++++++++++++++++++++++++++++++++++ > > arch/riscv/mm/tlbflush.c | 45 ++++++++++++++-- > > 2 files changed, 144 insertions(+), 4 deletions(-) > > > > diff --git a/arch/riscv/include/asm/riscv_tlb.h > > b/arch/riscv/include/asm/riscv_tlb.h > > new file mode 100644 > > index 000000000000..4d5f48112941 > > --- /dev/null > > +++ b/arch/riscv/include/asm/riscv_tlb.h > > Normal convention would be to have "trace" in the name. riscv_trace.h ? > > As riscv_tlb.h looks to be specific about tlb and not tracing. > > -- Steve >
Hi Steve, Thanks for the suggestion. I've renamed the header to arch/riscv/include/asm/tlb_trace.h in v7. I prefer this over riscv_trace.h because the latter sounds too generic for a header dedicated to TLB tracing. Did you have a broader use in mind, such as including other RISC-V tracepoints in this header? If you still prefer riscv_trace.h, I'm happy to reconsider. The updated patch is available here: https://lore.kernel.org/linux-riscv/[email protected]/ > > > @@ -0,0 +1,103 @@ > > +/* SPDX-License-Identifier: GPL-2.0 */ > > +#undef TRACE_SYSTEM > > +#define TRACE_SYSTEM riscv_tlb > > + > > +#if !defined(_TRACE_RISCV_TLB_H) || defined(TRACE_HEADER_MULTI_READ) > > +#define _TRACE_RISCV_TLB_H > > + > > +#include <linux/cpumask.h> > > +#include <linux/tracepoint.h> > > +#include <linux/perf_event.h> > > + > > +#ifndef _TRACE_RISCV_TLB_ENUMS > > +#define _TRACE_RISCV_TLB_ENUMS > > + > > +enum riscv_tlb_flush_scope { > > + RISCV_TLB_FLUSH_SCOPE_SINGLE, > > + RISCV_TLB_FLUSH_SCOPE_RANGE, > > + RISCV_TLB_FLUSH_SCOPE_ADDRESS_SPACE, > > + RISCV_TLB_FLUSH_SCOPE_ALL, > > +}; > > + > > +#endif /* _TRACE_RISCV_TLB_ENUMS */ > > + > > +TRACE_DEFINE_ENUM(RISCV_TLB_FLUSH_SCOPE_SINGLE); > > +TRACE_DEFINE_ENUM(RISCV_TLB_FLUSH_SCOPE_RANGE); > > +TRACE_DEFINE_ENUM(RISCV_TLB_FLUSH_SCOPE_ADDRESS_SPACE); > > +TRACE_DEFINE_ENUM(RISCV_TLB_FLUSH_SCOPE_ALL); > > + > > +#define show_riscv_tlb_flush_scope(scope) \ > > + __print_symbolic(scope, \ > > + { RISCV_TLB_FLUSH_SCOPE_SINGLE, "single" }, \ > > + { RISCV_TLB_FLUSH_SCOPE_RANGE, "range" }, \ > > + { RISCV_TLB_FLUSH_SCOPE_ADDRESS_SPACE, "address-space" }, \ > > + { RISCV_TLB_FLUSH_SCOPE_ALL, "all" }) > > + > > +/* > > + * Record the invalidation request received by the RISC-V architecture code > > + * > > + * The target CPU mask represents the CPUs Linux intends to cover for the > > + * request. It can be correlated with per-CPU activity, but does not > > describe > > + * which harts ultimately performed an invalidation. > > + * > > + * The ASID is hardware-visible and may be reused. It must not be treated > > as a > > + * persistent identifier for an mm. > > + * > > + * The stride describes the invalidation granularity supplied to the RISC-V > > + * implementation. > > + * > > + * The event records the invalidation request before it is dispatched. It > > does > > + * not describe the mechanism used to execute the request. > > + * > > + */ > > +TRACE_EVENT(riscv_tlb_flush_request, > > + TP_PROTO(unsigned long start, unsigned long size, > > + unsigned long stride, unsigned long asid, bool has_mm, > > + const struct cpumask *cmask, > > + enum riscv_tlb_flush_scope scope), > > + > > + TP_ARGS(start, size, stride, asid, has_mm, cmask, scope), > > + > > + TP_STRUCT__entry(__field(unsigned long, start) > > + __field(unsigned long, size) > > + __field(unsigned long, stride) > > + __field(unsigned long, asid) > > + __field(bool, has_mm) > > + __field(unsigned int, target_mask_weight) > > + __cpumask(target_cpus) > > + __field(u32, scope) > > + ), > > + > > + TP_fast_assign(__entry->start = start; > > + __entry->size = size; > > + __entry->stride = stride; > > + __entry->asid = asid; > > + __entry->has_mm = has_mm; > > + __assign_cpumask(target_cpus, cpumask_bits(cmask)); > > + __entry->target_mask_weight = cpumask_weight((const struct > > cpumask *) > > + > > __get_cpumask(target_cpus)); > > + __entry->scope = scope; > > + ), > > + > > + TP_printk("start=%#lx size=%#lx stride=%#lx asid=%#lx has_mm=%d > > target_mask_weight=%u target_cpus=%s scope=%s", > > + __entry->start, __entry->size, __entry->stride, > > + __entry->asid, __entry->has_mm, > > + __entry->target_mask_weight, __get_cpumask(target_cpus), > > + show_riscv_tlb_flush_scope(__entry->scope)) > > +); > > + -- Kind regards, Roman 'Hedin' Storozhenko
