Hi Brad,
> - The hcca is allocated from consistent memory but then bus_to_virt is
> used on the allocation (which will fail, at least on some
> implementations).
That is, in hc_start() about line 2033? It should use ohci->hcca_dma,
not virt_to_bus(ohci->hcca), yes. Good catch! I'll send out an
updated ohci-hcca.patch soon.
Was that the only real difference between the hcca deltas in your ARM
version and in this patch? It ought to be.
> - I think there is more than one place where the cache needs to be
> invalidated or written back to guarantee the transfered data
Actually, maybe it's better to hold off on that ohci-wback patch.
The data buffer should really be getting the pci_map_single()
treatment.
> - if the data needs to be flushed/invalidated, why don't the td's &
> ed's? with just these patches won't the td's & ed's will come from
> cached memory?
This patch doesn't touch the TD/ED handling; as you know, that
stuff needs to use pci_consistent_alloc(). Both you and Steve had
decoupled ED allocation from device allocation, too.
> (I'm not going to hold the strong-arm ohci driver up as a pretty solution,
> but it I beleive it gets close to solving all these problems and has
> flush/invalidate macros in the right places)
So let's try to merge the best of the MIPS and ARM solutions!
After a cup of coffee, of course ... :)
- Dave
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