Hi folks,
I'm looking for how to modify the counter which determines how often
HcDoneHead register must be written to HCCA.
Actually, I have a problem of receiving the sent TDs. These TDs are sent to
device and get ACK as responce from device, I see them by using USB
Analyzer, but I don't see them back to my HCCA.doneHead. What could be the
problem ? Is the doneHead overwitten so fast that I lose these TDs ?
Thank you in advance for your help.
Regerds,
Tri.
> Hi Roman,
>
> > David Brownell wrote:
> > >
> > > For OHCI another way to solve the done_list bus_to_virt isssue:
> > >
> > > ...
> > > td = ohci->dma_hash[(dma>>SOME_SHIFT)%TD_HASH_SIZE];
> > > ...
> > >
> > > Hashes maintained in td_alloc and td_free. Seems familiar.
> > > Brad, Steve -- that kind of thing? It'd be great to see a patch
> > > along these lines. I think Roman's right: most systems won't
> > > have many tds active at a time. Usually one td per urb.
> > >
> > Ok, thats a good starting point, but I also like Alans idea
> > to hash just the page addresses.
>
> The question in my mind is what gets hashed to what. The snippet
> I sent along hashes dma addresses into a (sparse) hashtable of TDs
> (then chains the collisions). Fast enough; though there's a space
> penalty (extra driver data, making up for no bus_to_virt analogue).
>
> Hashing dma addresses to pages makes sense to me only inside
> the allocator, which knows how these blocks are assigned to pages,
> and what pages really exist. But maybe someone else can show
> me a place outside an allocator which can maintain that data reliably,
> and with less cost, than either of the solutions I've proposed so far.
> (One within the allocator using page-level smarts, and this more
> recent one outside.)
>
> - Dave
>
>
>
>
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