Hi Freaks,
i just want to know if the patch for the amd controller is already
built-in in some test kernel or if there is a way to easy patch the
usb-ohci.c file ;)
thx for your hard work to make linux the best os ever !
[EMAIL PROTECTED] schrieb:
>
> --- the forwarded message follows ---
>
> ------------------------------------------------------------------------
>
> Betreff: RE: Contacts within AMD? AMD-756 USB host-controller
> blacklistedd ue to erratum #4
> Datum: Fri, 13 Apr 2001 20:18:23 -0500
> Von: [EMAIL PROTECTED]
> An: [EMAIL PROTECTED]
>
> Miles,
>
> I discovered that really all you need for this is a few simple facts. Here
> then is an unofficial workaround for Errata #4 on the AMD-756 Rev D2
> peripheral bus controller. This errata pertains *only* to Rev D2 of the
> AMD-756 peripheral bus controller. The errata was corrected on later
> revisions. To uniquely identify the AMD 756 Rev D2, refer to the "AMD-756
> Peripheral Bus Controller Revision Guide", in the section on "PCI Revision
> Documentation", pg 6
> (www.amd.com/products/cpg/athlon/techdocs/pdf/22591.pdf)
>
> In a couple of days, the official workaround and sample code will be posted
> on
> AMD's website, www.amd.com. I will mail you a pointer when it gets there.
> But, I realize that the Linux folks have been asking for this info for a
> while, so here is an informal, unofficial preview of a workaround for the
> errata on Rev D2.
>
> Whenever a USB device is initialized, it should be detected by the
> AMD-756-Rev-D2 USB host controller. However, on occasion, the USB controller
> does not enumerate slow-speed devices. When the AMD-756-Rev-D2 peripheral
> bus
> controller is performing USB-initiated PCI master cycles and a USB device is
> initialized, it may not be detected correctly. During this time, the
> following
> registers may contain incorrect status in the USB operation mode --
> HcRhDescriptorA1 (offset 48h) , HcRhDescriptorA2 (offset 4Ah), and
> HcRhPortStatus[1:4] (offset 54h to 63h). This behavior only exists for
> low-speed devices. This behavior is seen when slow-speed devices are
> occasionally not detected at boot time or when hot-plugged.
>
> A suggested workaround when reading any of these registers is to perform the
> read in a loop until the returned value for most of the reserved bits of
> that
> register are read as zero. Thus, for each iteration, the value read is
> logically-anded to a mask (to keep just the value of the reserved bits) and
> compared with zero. A loop count of 10 can be used for timeout. These
> registers usually return the correct status in 5 or 6 reads. Here are the
> masks to use for each of these registers:
>
> HcRhDescriptorA1: E000h
> HcRhDescriptorA2: FC0Fh
> HcRhPortStatus[n]: FFE0FCE0h
>
> This method must be implemented for all four USB ports supported by the
> AMD-756
> peripheral bus controller.
>
> Lastly, you should consider the following issues for proper USB
> initialization
> on the AMD-756 peripheral bus controller Rev D2.
>
> + The NoPowerSwitching bit should be set in HcRhDescriptorA to indicate that
> the USB ports are always powered on for AMD-756 USB controller.
>
> + When the SMI is enabled for USB legacy support, the SMI_EN bit (PM2C[0])
> is
> the only bit that needs to be enabled for the USB SMI generation. The
> interrupt status has to be evaluated from the USB controller, not from the
> PMIO space. The USBSMI_EN bit (PM2A[4]) should not be enabled for the USB
> legacy support.
>
> - Rich Brunner @ AMD
--
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