On Wed, 2005-04-20 at 10:30 +0200, Lothar Wassmann wrote: > > 1b. I'm triggering the _WARN_ON statements regarding HCuPINT_EOT at > > the end of write_buffer (which I'm assuming is the cause of 1a) > > > Yes. This is a sure sign that write instructions complete before the > actual write to the device has taken place. The last writes to the > fifo are still outstanding when the read of the status register is > performed, thus it reports that not all data has been transferred. > > This also means that the delay function that should guarantee the > minimum time between writing the addr reg and accessing the data reg > will complete before the actual write to the addr reg has taken > place. > > How did you implement the delay function? > > What is your system architecture?
I am suffering from a similar problem when using the CHIP_BUFFER_TEST
macro - I have implemented the delay function as:
static void isp1362_delay(struct device *dev, unsigned int delay)
{
(void) *(volatile unsigned long *)UNCACHED_PHYS_0;
}
but changing to use NDELAY doesn't seem to change the behaviour at all.
This is all on a PXA255 based system.
Andre
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