Alan Stern wrote:

Yes, it is wrong.  The value in the byte at offset 0x40 should be
0x40, not 0.

The patch below (for 2.6.15) should fix that. Try running the lspci command again after the patch is installed and make sure the byte
gets set correctly.  With luck, this will eliminate your spurious
disconnects.  It won't affect the bus-mastering issue, however.

Confirmed to not solve the "async schedule activation" problem. This is my lspci -xxx -s 9.2, with your patch applied, with ehci-hcd loaded, before switching on the USB2 drive (hda still at 50MB/s):

00:09.2 USB Controller: VIA Technologies, Inc. USB 2.0 (rev 63)
00: 06 11 04 31 17 01 10 02 63 20 03 0c 10 40 80 00
10: 00 fe ff ef 00 00 00 00 00 00 00 00 00 00 00 00
20: 00 00 00 00 00 00 00 00 00 00 00 00 06 11 04 31
30: 00 00 00 00 80 00 00 00 00 00 00 00 03 03 00 00
40: 40 00 03 00 00 00 00 00 a0 20 00 09 00 00 ff ff
50: 00 5a 00 80 00 00 00 00 04 0b 88 88 33 00 00 00
60: 20 20 01 00 00 00 00 00 01 00 00 01 00 00 08 e0
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
80: 01 00 c2 ff 00 00 00 00 00 00 00 00 00 00 00 00
90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
f0: 00 00 00 00 00 00 00 03 00 00 00 00 00 00 00 00

After switching on the USB2 drive (hda at 42MB/s) only byte 0x52 changes, from 0x00 to 0x04.

Rene.


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