Bari Ari wrote:
> Allan MacKinnon wrote:
>
>> Ronald G Minnich wrote:
>>
>> > and the good news: on our SiS 730, K7-based machines, we're getting
>> > 230 MB/second from streams benchmark. This implies that fixing ecc
>> > will add 4 seconds to boot for a 1 GB machine. Bummer.
>> >
>> >
>> Is the K7's L2 cache enabled yet or is this still in the works?
>>
>>
>>
> AMD has their L2 cache init under NDA, but I've been told that it's
> soon to be GPL'd with some nice new docs from AMD. I haven't heard
> that anyone has reversed engineered the init yet like it has been done
> with the P-II.
>
> Bari
Well it could be easy to reverse engineer if the bios has an option to
enable/disable it. This would have to be
stored in nvram... zero in on it by comparing /dev/nvram with it
on/off. Scan bios code for access to
CMOS.... where it decoded the bit in question. just copy what comes
next...
