On Sat, May 16, 2020 at 07:42:26AM -0700, Richard Cochran wrote:
> Recently the Linux kernel's PTP Hardware Clock interface was expanded
> to include a "write phase" mode where the clock servo in implemented
> in hardware. This mode hearkens back to the tradition ntp_adjtime
> interface, passing a measured offset into the kernel's servo.
Is there some description of how the hardware PLL works and why
would linuxptp want to support it?
> This patch adds a new configuration option and logic to support the
> write phase mode.
I suspect the sanity check needs to be disabled in this mode as we
don't know the real frequency.
> --- a/clockadj.c
> +++ b/clockadj.c
> @@ -79,6 +79,18 @@ double clockadj_get_freq(clockid_t clkid)
> return f;
> }
>
> +void clockadj_set_phase(clockid_t clkid, long offset)
> +{
> + struct timex tx;
> + memset(&tx, 0, sizeof(tx));
> +
> + tx.modes |= ADJ_OFFSET;
ADJ_NANO is not required?
> + tx.offset = offset;
> + if (clock_adjtime(clkid, &tx) < 0) {
> + pr_err("failed to set the clock offset: %m");
> + }
> +}
> +
> void clockadj_step(clockid_t clkid, int64_t step)
> {
> struct timex tx;
--
Miroslav Lichvar
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