On Mon, May 18, 2020 at 09:43:51AM +0200, Miroslav Lichvar wrote: > On Sat, May 16, 2020 at 07:42:26AM -0700, Richard Cochran wrote: > > Recently the Linux kernel's PTP Hardware Clock interface was expanded > > to include a "write phase" mode where the clock servo in implemented > > in hardware. This mode hearkens back to the tradition ntp_adjtime > > interface, passing a measured offset into the kernel's servo. > > Is there some description of how the hardware PLL works and why > would linuxptp want to support it?
This isn't about a particular hardware PLL but rather making use of an interface. It isn't even really about hardware servos per se. Together with SW time stamping, this lets the user choose the kernel's servo, for example. For another example, this one a HW implementation, check this out. https://www.idt.com/us/en/products/clocks-timing/application-specific-clocks/network-synchronization/ieee-1588-and-synchronous-ethernet-clocks/8a34001-system-synchronizer-ieee-1588-eight-channels > > --- a/clockadj.c > > +++ b/clockadj.c > > @@ -79,6 +79,18 @@ double clockadj_get_freq(clockid_t clkid) > > return f; > > } > > > > +void clockadj_set_phase(clockid_t clkid, long offset) > > +{ > > + struct timex tx; > > + memset(&tx, 0, sizeof(tx)); > > + > > + tx.modes |= ADJ_OFFSET; > > ADJ_NANO is not required? Yes, good catch. The kernel interface also needs this... Thanks, Richard _______________________________________________ Linuxptp-devel mailing list Linuxptp-devel@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/linuxptp-devel
