Hi, just out of curiosity: the LAN7430 [1] became available this week which might meet your requirements?
They also have linux drivers in the mainline kernel.

[1] https://www.microchip.com/wwwproducts/en/LAN7430

On 21.01.19 22:00, Arthur Dent wrote:
Mike, thank you for your reply.
Before starting interfacing a new PHY my main question is: Is DP83640 the only 
option to get a 1PPS with less jitter/wander than I have using HW timestamping 
in MAC? I am not sure if I understand the driver support matrix on 
linuxptp.sourceforge.net correctly.
I have not yet interfaced DP83640 since I would prefer to have a PHY with a 1Gb 
interface if possible.
BR
AD
Sent: Monday, January 21, 2019 at 3:14 PM
From: "Lynch, Mike" <mike.ly...@hbm.com>
To: "Arthur Dent" <arthurd...@cyberdude.com>
Subject: RE: RE: [Linuxptp-users] PHYs supporting HW timestamping
It sounds like you are doing something very similar to what I am doing using 
the same part. Are you referring to the PPS output from the PTP hardware in the 
SoC? If so, I'm not using that and can't offer much in the way of guidance. I 
don't bother with the PPS stuff and get a max of 2 clocks (40Mhz) of jitter 
using linuxptp (ptp4l) on the slave(s) side.

-----Original Message-----
From: Arthur Dent [mailto:arthurd...@cyberdude.com]
Sent: Monday, January 21, 2019 8:05 AM
To: Lynch, Mike <mike.ly...@hbm.com>
Cc: linuxptp-users@lists.sourceforge.net
Subject: Re: RE: [Linuxptp-users] PHYs supporting HW timestamping

Hi Mike,
In my application the time I get with MAC timestamping is good enough, but not 
the 1PPS signal. With two boards, one master and one slave connected 
back-to-back the max 1PPS jitter is approximately 200ns.
The 1PPS on the slave side will be used to regenerate a higher frequency clock. 
 My goal is to get down to 10-20ns 1PPS jitter.
I am using a high stability external PTP clock reference for both master and 
slave.
BR
AD


Sent: Monday, January 21, 2019 at 2:15 PM
From: "Lynch, Mike" <mike.ly...@hbm.com>
To: "Arthur Dent" <arthurd...@cyberdude.com>
Subject: RE: [Linuxptp-users] PHYs supporting HW timestamping

Are you using an internal or external PTP reference clock? Is 150Mhz accurate 
enough or do you need to account for the latency between the PHY and the MAC?

-----Original Message-----
From: Arthur Dent [mailto:arthurd...@cyberdude.com]
Sent: Monday, January 21, 2019 3:08 AM
To: linuxptp-users@lists.sourceforge.net
Subject: [Linuxptp-users] PHYs supporting HW timestamping

Hi
On my Cyclone V SoC board I have ptp running with HW timestamping in MAC 
(stmmac), but I need even better accuracy, i.e. hardware timestamping in PHY. 
Is my only option to use TI’s DP83640 PHY (which only supports 100Mb) or am I 
reading the information on 
http://atpscan.global.hornetsecurity.com/index.php?atp_str=6oEZ_WXDKGAgauHn9VB73M-nT30yjx2ABcTlxmWMq6JKzSTQ7blQiVqL8avnNdU4IWMtn73mMShRf4sHOZqJ6G-pQlFVkhKaFMUjHFrGN09wLO54ty3kciK4oEzA0W-w1SsmHGzsH5Nca8_FAfL1Nx_SkGUUcbRWDpyrFhWgL6dCnPZd7_6L-eTBZq7UAQ6L_sRne2KmnqLsv_IyDHhODWoIF-8xU0sb9YHQJZYt2LeAeHV3Q8M4nCTf78tJhMxhlZBtFZoe5vvEWDJTz73IhqXgT97gaScEyTICQYC7IVBrXammN_QlBPIq2iM6OiM5MjZmM2JjMGMzYWMjOjojCy5R8n1LNQf7w6MmG4hPhA
 0incorrectly?
BR
AD


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