================ @@ -188,6 +190,35 @@ void DivergenceLoweringHelper::constrainAsLaneMask(Incoming &In) { In.Reg = Copy.getReg(0); } +void replaceUsesOfRegInInstWith(Register Reg, MachineInstr *Inst, + Register NewReg) { + for (MachineOperand &Op : Inst->operands()) { + if (Op.isReg() && Op.getReg() == Reg) + Op.setReg(NewReg); + } +} + +bool DivergenceLoweringHelper::lowerTemporalDivergence() { + AMDGPU::IntrinsicLaneMaskAnalyzer ILMA(*MF); + + for (auto [Inst, UseInst, _] : MUI->getTemporalDivergenceList()) { ---------------- ruiling wrote:
I am not sure if it is ok to assume only the first `def` can be temporal divergent. Maybe holds a map from the `Register` to a array of temporal divergence users? https://github.com/llvm/llvm-project/pull/124298 _______________________________________________ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits