================
@@ -133,6 +133,43 @@ void RegBankLegalizeHelper::widenLoad(MachineInstr &MI, 
LLT WideTy,
   MI.eraseFromParent();
 }
 
+void RegBankLegalizeHelper::lowerVccExtToSel(MachineInstr &MI) {
+  Register Dst = MI.getOperand(0).getReg();
+  LLT Ty = MRI.getType(Dst);
+  Register Src = MI.getOperand(1).getReg();
+  unsigned Opc = MI.getOpcode();
+  int TrueExtCst = (Opc == G_SEXT ? -1 : 1);
----------------
arsenm wrote:

```suggestion
  int TrueExtCst = Opc == G_SEXT ? -1 : 1;
```

https://github.com/llvm/llvm-project/pull/132383
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