================
@@ -1303,33 +1306,33 @@ bool
RegBankLegalizeHelper::lowerSetRounding(MachineInstr &MI) {
if (UseReducedTable) {
// Truncate to the low 32-bits.
auto BitTable = B.buildConstant(
- SgprRB_S32, AMDGPU::FltRoundToHWConversionTable & 0xffff);
+ SgprRB_I32, AMDGPU::FltRoundToHWConversionTable & 0xffff);
- auto Two = B.buildConstant(SgprRB_S32, 2);
- auto RoundModeTimesNumBits = B.buildShl(SgprRB_S32, NewMode, Two);
+ auto Two = B.buildConstant(SgprRB_I32, 2);
+ auto RoundModeTimesNumBits = B.buildShl(SgprRB_I32, NewMode, Two);
NewMode =
- B.buildLShr(SgprRB_S32, BitTable, RoundModeTimesNumBits).getReg(0);
+ B.buildLShr(SgprRB_I32, BitTable, RoundModeTimesNumBits).getReg(0);
// TODO: A demanded-bits simplification on the setreg source here could
// likely reduce the table extracted bits into inline immediates.
} else {
// table_index = umin(value, value - 4)
// MODE.fp_round = (bit_table >> (table_index << 2)) & 0xf
- auto NegFour = B.buildConstant(SgprRB_S32, -4);
- auto OffsetEnum = B.buildAdd(SgprRB_S32, NewMode, NegFour);
- auto IndexVal = B.buildUMin(SgprRB_S32, NewMode, OffsetEnum);
+ auto NegFour = B.buildConstant(SgprRB_I32, -4);
+ auto OffsetEnum = B.buildAdd(SgprRB_I32, NewMode, NegFour);
+ auto IndexVal = B.buildUMin(SgprRB_I32, NewMode, OffsetEnum);
- auto Two = B.buildConstant(SgprRB_S32, 2);
- auto RoundModeTimesNumBits = B.buildShl(SgprRB_S32, IndexVal, Two);
+ auto Two = B.buildConstant(SgprRB_I32, 2);
+ auto RoundModeTimesNumBits = B.buildShl(SgprRB_I32, IndexVal, Two);
- auto BitTable =
- B.buildConstant({SgprRB, S64}, AMDGPU::FltRoundToHWConversionTable);
- auto TableValue =
- B.buildLShr({SgprRB, S64}, BitTable, RoundModeTimesNumBits);
+ auto BitTable = B.buildConstant({SgprRB, LLT::integer(64)},
----------------
chinmaydd wrote:
`I64` for `LLT::integer(64)`
https://github.com/llvm/llvm-project/pull/208270
_______________________________________________
llvm-branch-commits mailing list
[email protected]
https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits