* David Daney ([email protected]) wrote: > On 02/14/2011 11:43 AM, Mathieu Desnoyers wrote: > >> Index: linux-2.6-lttng/arch/mips/include/asm/timex.h >> =================================================================== >> --- linux-2.6-lttng.orig/arch/mips/include/asm/timex.h >> +++ linux-2.6-lttng/arch/mips/include/asm/timex.h >> @@ -42,9 +42,32 @@ extern unsigned int mips_hpt_frequency; >> * will result in the timer interrupt getting lost. >> */ >> >> +#ifdef CONFIG_HAVE_GET_CYCLES >> +typedef unsigned int cycles_t; >> + >> +static inline cycles_t get_cycles(void) >> +{ >> + return read_c0_cvmcount(); >> +} > > > c0_cvmcount is not a standard register. It is an implementation defined > extension to mips64r2, therefore its use should be gated by: > > #ifdef CONFIG_CPU_CAVIUM_OCTEON
It actually is, thanks to the following Kconfig dep: +config HAVE_GET_CYCLES + def_bool y + depends on CPU_CAVIUM_OCTEON [...] But maybe is that a bit misleading for the future ? Thanks, Mathieu > > David Daney > -- Mathieu Desnoyers Operating System Efficiency R&D Consultant EfficiOS Inc. http://www.efficios.com _______________________________________________ ltt-dev mailing list [email protected] http://lists.casi.polymtl.ca/cgi-bin/mailman/listinfo/ltt-dev
