Hi Mathieu/David, The compilation issue is solved and I am able to run the lttng on 2.6.32 kernel with 0.188 patch set on Octeon board. I have fully applied your last patch and partially applied the earlier patch. * Thanks and Regards -Naresh Bhat*
On Tue, Feb 15, 2011 at 7:00 PM, Naresh Bhat <[email protected]> wrote: > Hi Mathieu/David, > > Thank you very much. The patch is applied without any issues. But facing > the linking errors. Is there any configuration missing in Kconfig ? > > * > Thanks and Regards > -Naresh Bhat* > * > Linking error log:* > > > ======================================================================================================== > .................. > ...................... > .............................. > AR arch/mips/lib/lib.a > LD vmlinux.o > MODPOST vmlinux.o > GEN .version > CHK include/linux/compile.h > UPD include/linux/compile.h > CC init/version.o > LD init/built-in.o > LD .tmp_vmlinux1 > ltt/built-in.o: In function `ltt_trace_destroy': > (.text.ltt_trace_destroy+0x6c): undefined reference to `put_synthetic_tsc' > ltt/built-in.o: In function `ltt_trace_alloc': > (.text.ltt_trace_alloc+0x5c): undefined reference to `get_synthetic_tsc' > ltt/built-in.o: In function `ltt_trace_alloc': > (.text.ltt_trace_alloc+0x164): undefined reference to > `trace_clock_read_synthetic_tsc' > ltt/built-in.o: In function `ltt_trace_alloc': > (.text.ltt_trace_alloc+0x454): undefined reference to `put_synthetic_tsc' > ltt/built-in.o: In function `ltt_trace_alloc': > (.text.ltt_trace_alloc+0x4b4): undefined reference to `put_synthetic_tsc' > ltt/built-in.o: In function `ltt_trace_alloc': > (.text.ltt_trace_alloc+0x4f8): undefined reference to `put_synthetic_tsc' > ltt/built-in.o: In function `ltt_reserve_slot_lockless_slow': > (.text.ltt_reserve_slot_lockless_slow+0xa8): undefined reference to > `trace_clock_read_synthetic_tsc' > ltt/built-in.o: In function `ltt_force_switch_lockless_slow': > (.text.ltt_force_switch_lockless_slow+0x44): undefined reference to > `trace_clock_read_synthetic_tsc' > ltt/built-in.o: In function `_ltt_specialized_trace': > (.text._ltt_specialized_trace+0x1cc): undefined reference to > `trace_clock_read_synthetic_tsc' > make: *** [.tmp_vmlinux1] Error 1 > # > > ============================================================================================== > === > > > > On Tue, Feb 15, 2011 at 9:02 AM, Mathieu Desnoyers < > [email protected]> wrote: > >> Is the following patch less confusing ? >> >> >> MIPS: octeon fix get_cycles >> >> Make sure get_cycles(), used by kernel/time/tsc-sync.c TSC synchronicity >> checker, works fine on octeon by using the full 64-bits. >> >> Signed-off-by: Mathieu Desnoyers <[email protected]> >> --- >> arch/mips/Kconfig | 11 +++++++++-- >> arch/mips/include/asm/timex.h | 31 ++++++++++++++++++++++++++++++- >> 2 files changed, 39 insertions(+), 3 deletions(-) >> >> Index: linux-2.6-lttng/arch/mips/Kconfig >> =================================================================== >> --- linux-2.6-lttng.orig/arch/mips/Kconfig >> +++ linux-2.6-lttng/arch/mips/Kconfig >> @@ -1949,9 +1949,16 @@ config CPU_R4400_WORKAROUNDS >> config HAVE_GET_CYCLES_32 >> def_bool y >> depends on !CPU_R4400_WORKAROUNDS >> + depends on !CPU_CAVIUM_OCTEON >> select HAVE_TRACE_CLOCK >> - select HAVE_TRACE_CLOCK_32_TO_64 if (!CPU_CAVIUM_OCTEON) >> - select HAVE_UNSYNCHRONIZED_TSC if (!CPU_CAVIUM_OCTEON) >> + select HAVE_TRACE_CLOCK_32_TO_64 >> + select HAVE_UNSYNCHRONIZED_TSC >> + >> +config HAVE_GET_CYCLES >> + def_bool y >> + depends on CPU_CAVIUM_OCTEON >> + select HAVE_TRACE_CLOCK >> + select HAVE_UNSYNCHRONIZED_TSC >> >> # >> # - Highmem only makes sense for the 32-bit kernel. >> Index: linux-2.6-lttng/arch/mips/include/asm/timex.h >> =================================================================== >> --- linux-2.6-lttng.orig/arch/mips/include/asm/timex.h >> +++ linux-2.6-lttng/arch/mips/include/asm/timex.h >> @@ -42,9 +42,36 @@ extern unsigned int mips_hpt_frequency; >> * will result in the timer interrupt getting lost. >> */ >> >> +#ifdef CONFIG_HAVE_GET_CYCLES >> +# ifdef CONFIG_CPU_CAVIUM_OCTEON >> +typedef unsigned int cycles_t; >> + >> +static inline cycles_t get_cycles(void) >> +{ >> + return read_c0_cvmcount(); >> +} >> + >> +static inline void get_cycles_barrier(void) >> +{ >> +} >> + >> +static inline cycles_t get_cycles_rate(void) >> +{ >> + return mips_hpt_frequency; >> +} >> + >> +extern int test_tsc_synchronization(void); >> +extern int _tsc_is_sync; >> +static inline int tsc_is_sync(void) >> +{ >> + return _tsc_is_sync; >> +} >> +# else /* #ifdef CONFIG_CPU_CAVIUM_OCTEON */ >> +# error "64-bit get_cycles() supported only on Cavium Octeon MIPS >> architectures" >> +# endif /* #else #ifdef CONFIG_CPU_CAVIUM_OCTEON */ >> +#elif defined(CONFIG_HAVE_GET_CYCLES_32) >> typedef unsigned int cycles_t; >> >> -#ifdef CONFIG_HAVE_GET_CYCLES_32 >> static inline cycles_t get_cycles(void) >> { >> return read_c0_count(); >> @@ -66,6 +93,8 @@ static inline int tsc_is_sync(void) >> return _tsc_is_sync; >> } >> #else >> +typedef unsigned int cycles_t; >> + >> static inline cycles_t get_cycles(void) >> { >> return 0; >> -- >> Mathieu Desnoyers >> Operating System Efficiency R&D Consultant >> EfficiOS Inc. >> http://www.efficios.com >> >
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