One question would be what that means, to disable hardware flow control. Does that mean to force the output signal from the VM to be asserted at the wire? Or to make the hosted software in the VM see the line as asserted even if it's not? Both?
And in my experience the most important flow control lines on the model t (unless using hterm or tback) is DTR/DSR though cts and rts can be relevant. I'm not sure how you're testing but I'd start with just TELCOM and realterm and a full null cable so you can get a feel for the flow control signals and what VT features are doing to help you. -- John. > >>>
