I have been looking at the memory hierarchy in Syscall emulation. The current implementation has a bus connecting the master interface of on chip cache to the L2 cache. Is it possible to change this interface between the chip and the L2 ie can more ports be added to the L2 ? I would really appreciate any kind of help.
Thanks,
Mishali
New Yahoo! Messenger with Voice. Call regular phones from your PC and save big.
