Just an example of why I think timingsnoop() is not only called on a cache
miss.
I simulate a system with multiple processors and no caches at all.
timingsnoop() is still being called and also traces show readreq packets have
destination of -1 (Broadcast). Thats why I asked is dest=Broadcast only on a
cache miss !
Also, if I add 70 some processor cycles to account for the actual latency due
to snooping and address arbitration logic on existing architectures, say
Power5,the overall number of ticks become humoungous..alomsot an 80% increase
:) but that maybe due to large number of read misses !
---- Original message ----
>Date: Sun, 18 Nov 2007 19:01:38 -0800
>From: "Steve Reinhardt" <[EMAIL PROTECTED]>
>Subject: Re: [m5-users] recvtiming(), bus.cc, packet Broadcast, timingsnoop()
>To: "M5 users mailing list" <m5-users@m5sim.org>
>
>On Nov 18, 2007 5:50 PM, Shoaib Akram <[EMAIL PROTECTED]> wrote:
>> I have a question regarding the recvtiming() function in bus.cc. Please
>> refer to the following code snippet:
>>
>> if (dest == Packet::Broadcast) {
>> port = findPort(pkt->getAddr(), pkt->getSrc());
>> if (timingSnoop(pkt, port ? port : interfaces[pkt->getSrc()])) {
>> bool success;
>>
>> pkt->flags |= SNOOP_COMMIT;
>> success = timingSnoop(pkt, port ? port : .....
>
>It looks like you're using an old version... you should upgrade to
>2.0b4. The bus code is somewhat cleaned up. In particular there's no
>SNOOP_COMMIT flag anymore.
>
>>
>> Does the destination field in packet is set to Broadcast each time a cache
>> miss occurs?
>
>Yes.
>
>> If not, under what scenario is the destination of packet a Broadcast. Looks
>> like timingsnoop() is being called on events other than a cache miss !
>
>Can you give some examples?
>
>> Also, any ideas how I can track the information that the current packet
>> needs to occupy the bus because of an earlier cache miss.
>
>Can you be more specific? Packets are already delayed if necessary
>due to earlier bus traffic; that's what tickNextIdle is all about.
>
>Steve
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