Can you please tell me where should i change to get the effect? I changed in src/python/m5/objects/PhysicalMemory.py as follows: "cpu_ratio = Param.Int(10,"ratio between CPU speed and memory bus speed") "
Also changed "latency = Param.Latency('1ms', "latency of an access")" but execution time is remaining exactly same (by execution time i am referring to tick value difference between program start and end) --- Steve Reinhardt <[EMAIL PROTECTED]> escribió: > Have you looked at the latency settings for the bus > and main memory? > The defaults for these are unreasonably low. If you > want realistic > results you'll have to modify these parameters to > whatever you believe > to be realistic values. > > Steve > > On Nov 24, 2007 11:31 AM, abc def > <[EMAIL PROTECTED]> wrote: > > >From trace files it seems that cache hit latency > is > > around 1000 ticks to 2000 ticks, but if it misses > then > > the latency is ~6000 cycles but not more. Now in > the > > simulation there is no L2 so,how come second > latency > > which is the memory access latency is so close of > L1 > > access latency? > > > > > > > > ______________________________________________ > > ¿Chef por primera vez? > > Sé un mejor Cocinillas. > > http://es.answers.yahoo.com/info/welcome > > _______________________________________________ > > m5-users mailing list > > m5-users@m5sim.org > > http://m5sim.org/cgi-bin/mailman/listinfo/m5-users > > > _______________________________________________ > m5-users mailing list > m5-users@m5sim.org > http://m5sim.org/cgi-bin/mailman/listinfo/m5-users > ______________________________________________ ¿Chef por primera vez? Sé un mejor Cocinillas. http://es.answers.yahoo.com/info/welcome _______________________________________________ m5-users mailing list m5-users@m5sim.org http://m5sim.org/cgi-bin/mailman/listinfo/m5-users