Merced (was Re: Mersenne: Re: Alpha DS20 timings.)

[Simon Burge]

"Aaron Blosser" wrote:

> I can't wait for Merced and direct access to all of those FPU and general
> purpose INT registers.  You think 30 is yummy, how about 128 FPU and 128 gen
> purpose?  A virtual feast!
> 
> I imagine you could significantly speed up the code by keeping much of the
> data in register.  REG-REG operations take a lot less time than a REG-MEM
> operation.  Should be delicious.

>From what I understand of Merced, compiler technology is going to be the
problem.  It's probably not unreasonable to expect large performance
increases as the intelligence of compilers (especially the "free"
compilers like gcc and egcs) catches up to the theoretical performance
of the CPU.

Simon.
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