From: Marek Olšák <[email protected]>
---
src/gallium/drivers/radeon/r600_pipe_common.c | 2 ++
src/gallium/drivers/radeon/r600_pipe_common.h | 3 +++
src/gallium/drivers/radeon/r600_texture.c | 4 +++-
src/gallium/drivers/radeonsi/si_pipe.c | 5 +++++
src/gallium/drivers/radeonsi/si_state.c | 3 ++-
5 files changed, 15 insertions(+), 2 deletions(-)
diff --git a/src/gallium/drivers/radeon/r600_pipe_common.c
b/src/gallium/drivers/radeon/r600_pipe_common.c
index ce61211..d7927aa 100644
--- a/src/gallium/drivers/radeon/r600_pipe_common.c
+++ b/src/gallium/drivers/radeon/r600_pipe_common.c
@@ -622,20 +622,22 @@ static const struct debug_named_value
common_debug_options[] = {
{ "precompile", DBG(PRECOMPILE), "Compile one shader variant at shader
creation." },
{ "nowc", DBG(NO_WC), "Disable GTT write combining" },
{ "check_vm", DBG(CHECK_VM), "Check VM faults and dump debug info." },
{ "nodcc", DBG(NO_DCC), "Disable DCC." },
{ "nodccclear", DBG(NO_DCC_CLEAR), "Disable DCC fast clear." },
{ "norbplus", DBG(NO_RB_PLUS), "Disable RB+." },
{ "sisched", DBG(SI_SCHED), "Enable LLVM SI Machine Instruction
Scheduler." },
{ "mono", DBG(MONOLITHIC_SHADERS), "Use old-style monolithic shaders
compiled on demand" },
{ "unsafemath", DBG(UNSAFE_MATH), "Enable unsafe math shader
optimizations" },
{ "nodccfb", DBG(NO_DCC_FB), "Disable separate DCC on the main
framebuffer" },
+ { "nodccmsaa", DBG(NO_DCC_MSAA), "Disable DCC for MSAA" },
+ { "dccmsaa", DBG(DCC_MSAA), "Enable DCC for MSAA" },
{ "nodpbb", DBG(NO_DPBB), "Disable DPBB." },
{ "nodfsm", DBG(NO_DFSM), "Disable DFSM." },
{ "dpbb", DBG(DPBB), "Enable DPBB." },
{ "dfsm", DBG(DFSM), "Enable DFSM." },
{ "nooutoforder", DBG(NO_OUT_OF_ORDER), "Disable out-of-order
rasterization" },
{ "reserve_vmid", DBG(RESERVE_VMID), "Force VMID reservation per
context." },
DEBUG_NAMED_VALUE_END /* must be last */
};
diff --git a/src/gallium/drivers/radeon/r600_pipe_common.h
b/src/gallium/drivers/radeon/r600_pipe_common.h
index adfcc7c..2ece409 100644
--- a/src/gallium/drivers/radeon/r600_pipe_common.h
+++ b/src/gallium/drivers/radeon/r600_pipe_common.h
@@ -112,20 +112,22 @@ enum {
DBG_NO_DFSM,
DBG_DPBB,
DBG_DFSM,
DBG_NO_HYPERZ,
DBG_NO_RB_PLUS,
DBG_NO_2D_TILING,
DBG_NO_TILING,
DBG_NO_DCC,
DBG_NO_DCC_CLEAR,
DBG_NO_DCC_FB,
+ DBG_NO_DCC_MSAA,
+ DBG_DCC_MSAA,
/* Tests: */
DBG_TEST_DMA,
DBG_TEST_VMFAULT_CP,
DBG_TEST_VMFAULT_SDMA,
DBG_TEST_VMFAULT_SHADER,
};
#define DBG_ALL_SHADERS (((1 << (DBG_CS + 1)) - 1))
#define DBG(name) (1ull << DBG_##name)
@@ -386,20 +388,21 @@ struct r600_memory_object {
struct r600_common_screen {
struct pipe_screen b;
struct radeon_winsys *ws;
enum radeon_family family;
enum chip_class chip_class;
struct radeon_info info;
uint64_t debug_flags;
bool has_rbplus; /* if RB+ registers
exist */
bool rbplus_allowed; /* if RB+ is allowed */
+ bool dcc_msaa_allowed;
struct disk_cache *disk_shader_cache;
struct slab_parent_pool pool_transfers;
/* Texture filter settings. */
int force_aniso; /* -1 = disabled */
/* Auxiliary context. Mainly used to initialize resources.
* It must be locked prior to using and flushed before unlocking. */
diff --git a/src/gallium/drivers/radeon/r600_texture.c
b/src/gallium/drivers/radeon/r600_texture.c
index 139f735..e3658b4 100644
--- a/src/gallium/drivers/radeon/r600_texture.c
+++ b/src/gallium/drivers/radeon/r600_texture.c
@@ -260,21 +260,23 @@ static int r600_init_surface(struct r600_common_screen
*rscreen,
flags |= RADEON_SURF_TC_COMPATIBLE_HTILE;
}
if (is_stencil)
flags |= RADEON_SURF_SBUFFER;
}
if (rscreen->chip_class >= VI &&
(ptex->flags & R600_RESOURCE_FLAG_DISABLE_DCC ||
ptex->format == PIPE_FORMAT_R9G9B9E5_FLOAT ||
- ptex->nr_samples >= 2))
+ /* DCC MSAA array textures are disallowed due to incomplete clear
impl. */
+ (ptex->nr_samples >= 2 &&
+ (!rscreen->dcc_msaa_allowed || ptex->array_size > 1))))
flags |= RADEON_SURF_DISABLE_DCC;
if (ptex->bind & PIPE_BIND_SCANOUT || is_scanout) {
/* This should catch bugs in gallium users setting incorrect
flags. */
assert(ptex->nr_samples <= 1 &&
ptex->array_size == 1 &&
ptex->depth0 == 1 &&
ptex->last_level == 0 &&
!(flags & RADEON_SURF_Z_OR_SBUFFER));
diff --git a/src/gallium/drivers/radeonsi/si_pipe.c
b/src/gallium/drivers/radeonsi/si_pipe.c
index b3d8ae5..6e433a3 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.c
+++ b/src/gallium/drivers/radeonsi/si_pipe.c
@@ -1120,20 +1120,25 @@ struct pipe_screen *radeonsi_screen_create(struct
radeon_winsys *ws,
if (sscreen->b.family == CHIP_STONEY ||
sscreen->b.chip_class >= GFX9) {
sscreen->b.has_rbplus = true;
sscreen->b.rbplus_allowed =
!(sscreen->b.debug_flags & DBG(NO_RB_PLUS)) &&
(sscreen->b.family == CHIP_STONEY ||
sscreen->b.family == CHIP_RAVEN);
}
+ sscreen->b.dcc_msaa_allowed =
+ !(sscreen->b.debug_flags & DBG(NO_DCC_MSAA)) &&
+ (sscreen->b.debug_flags & DBG(DCC_MSAA) ||
+ sscreen->b.chip_class == VI);
+
(void) mtx_init(&sscreen->shader_parts_mutex, mtx_plain);
sscreen->use_monolithic_shaders =
(sscreen->b.debug_flags & DBG(MONOLITHIC_SHADERS)) != 0;
sscreen->b.barrier_flags.cp_to_L2 = SI_CONTEXT_INV_SMEM_L1 |
SI_CONTEXT_INV_VMEM_L1;
if (sscreen->b.chip_class <= VI) {
sscreen->b.barrier_flags.cp_to_L2 |= SI_CONTEXT_INV_GLOBAL_L2;
sscreen->b.barrier_flags.L2_to_cp |=
SI_CONTEXT_WRITEBACK_GLOBAL_L2;
}
diff --git a/src/gallium/drivers/radeonsi/si_state.c
b/src/gallium/drivers/radeonsi/si_state.c
index 4eee778..d59b363 100644
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -669,21 +669,22 @@ static void si_bind_blend_state(struct pipe_context *ctx,
void *state)
if (!state)
return;
si_pm4_bind_state(sctx, blend, state);
if (!old_blend ||
old_blend->cb_target_mask != blend->cb_target_mask ||
old_blend->dual_src_blend != blend->dual_src_blend ||
(old_blend->blend_enable_4bit != blend->blend_enable_4bit &&
- sctx->framebuffer.nr_samples >= 2))
+ sctx->framebuffer.nr_samples >= 2 &&
+ sctx->screen->b.dcc_msaa_allowed))
si_mark_atom_dirty(sctx, &sctx->cb_render_state);
if (!old_blend ||
old_blend->cb_target_mask != blend->cb_target_mask ||
old_blend->alpha_to_coverage != blend->alpha_to_coverage ||
old_blend->alpha_to_one != blend->alpha_to_one ||
old_blend->dual_src_blend != blend->dual_src_blend ||
old_blend->blend_enable_4bit != blend->blend_enable_4bit ||
old_blend->need_src_alpha_4bit != blend->need_src_alpha_4bit)
sctx->do_update_shaders = true;
--
2.7.4
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