From: Marek Olšák <[email protected]>
---
src/gallium/drivers/radeon/r600_texture.c | 35 ++++++++++++++++++++++++++-----
1 file changed, 30 insertions(+), 5 deletions(-)
diff --git a/src/gallium/drivers/radeon/r600_texture.c
b/src/gallium/drivers/radeon/r600_texture.c
index 0c30b62..139f735 100644
--- a/src/gallium/drivers/radeon/r600_texture.c
+++ b/src/gallium/drivers/radeon/r600_texture.c
@@ -2481,20 +2481,28 @@ void vi_dcc_clear_level(struct r600_common_context
*rctx,
if (rctx->chip_class >= GFX9) {
/* Mipmap level clears aren't implemented. */
assert(rtex->resource.b.b.last_level == 0);
/* MSAA needs a different clear size. */
assert(rtex->resource.b.b.nr_samples <= 1);
clear_size = rtex->surface.dcc_size;
} else {
unsigned num_layers = util_max_layer(&rtex->resource.b.b,
level) + 1;
+ /* If this is 0, fast clear isn't possible. (can occur with
MSAA) */
+ assert(rtex->surface.u.legacy.level[level].dcc_fast_clear_size);
+ /* Layered MSAA DCC fast clears need to clear
dcc_fast_clear_size
+ * bytes for each layer. This is not currently implemented, and
+ * therefore MSAA DCC isn't even enabled with multiple layers.
+ */
+ assert(rtex->resource.b.b.nr_samples <= 1 || num_layers == 1);
+
dcc_offset += rtex->surface.u.legacy.level[level].dcc_offset;
clear_size =
rtex->surface.u.legacy.level[level].dcc_fast_clear_size *
num_layers;
}
rctx->clear_buffer(&rctx->b, dcc_buffer, dcc_offset, clear_size,
clear_value, R600_COHERENCY_CB_META);
}
/* Set the same micro tile mode as the destination of the last MSAA resolve.
@@ -2617,20 +2625,21 @@ void si_do_fast_color_clear(struct r600_common_context
*rctx,
#ifdef PIPE_ARCH_BIG_ENDIAN
return;
#endif
if (rctx->render_cond)
return;
for (i = 0; i < fb->nr_cbufs; i++) {
struct r600_texture *tex;
unsigned clear_bit = PIPE_CLEAR_COLOR0 << i;
+ unsigned level = fb->cbufs[i]->u.tex.level;
if (!fb->cbufs[i])
continue;
/* if this colorbuffer is not being cleared */
if (!(*buffers & clear_bit))
continue;
tex = (struct r600_texture *)fb->cbufs[i]->texture;
@@ -2679,37 +2688,53 @@ void si_do_fast_color_clear(struct r600_common_context
*rctx,
* enable separate DCC.
*/
if (tex->dcc_gather_statistics &&
rctx->family == CHIP_STONEY)
tex->num_slow_clears++;
}
/* Try to clear DCC first, otherwise try CMASK. */
if (vi_dcc_enabled(tex, 0)) {
uint32_t reset_value;
- bool clear_words_needed;
+ bool clear_words_needed, cleared_cmask = false;
if (rctx->screen->debug_flags & DBG(NO_DCC_CLEAR))
continue;
+ /* This can only occur with MSAA. */
+ if (rctx->chip_class == VI &&
+
!tex->surface.u.legacy.level[level].dcc_fast_clear_size)
+ continue;
+
if (!vi_get_fast_clear_parameters(fb->cbufs[i]->format,
color, &reset_value,
&clear_words_needed))
continue;
+ /* DCC fast clear with MSAA should clear CMASK to 0xC.
*/
+ if (tex->resource.b.b.nr_samples >= 2 &&
tex->cmask.size) {
+ /* TODO: This doesn't work with MSAA. */
+ if (clear_words_needed)
+ continue;
+
+ rctx->clear_buffer(&rctx->b,
&tex->cmask_buffer->b.b,
+ tex->cmask.offset,
tex->cmask.size,
+ 0xCCCCCCCC,
R600_COHERENCY_CB_META);
+ cleared_cmask = true;
+ }
+
vi_dcc_clear_level(rctx, tex, 0, reset_value);
- unsigned level_bit = 1 << fb->cbufs[i]->u.tex.level;
- if (clear_words_needed) {
+ if (clear_words_needed || cleared_cmask) {
bool need_compressed_update =
!tex->dirty_level_mask;
- tex->dirty_level_mask |= level_bit;
+ tex->dirty_level_mask |= 1 << level;
if (need_compressed_update)
p_atomic_inc(&rctx->screen->compressed_colortex_counter);
}
tex->separate_dcc_dirty = true;
} else {
/* 128-bit formats are unusupported */
if (tex->surface.bpe > 8) {
continue;
}
@@ -2724,21 +2749,21 @@ void si_do_fast_color_clear(struct r600_common_context
*rctx,
continue;
}
/* Do the fast clear. */
rctx->clear_buffer(&rctx->b, &tex->cmask_buffer->b.b,
tex->cmask.offset, tex->cmask.size,
0,
R600_COHERENCY_CB_META);
bool need_compressed_update = !tex->dirty_level_mask;
- tex->dirty_level_mask |= 1 << fb->cbufs[i]->u.tex.level;
+ tex->dirty_level_mask |= 1 << level;
if (need_compressed_update)
p_atomic_inc(&rctx->screen->compressed_colortex_counter);
}
/* We can change the micro tile mode before a full clear. */
si_set_optimal_micro_tile_mode(rctx->screen, tex);
evergreen_set_clear_color(tex, fb->cbufs[i]->format, color);
--
2.7.4
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