From: Marek Olšák <[email protected]>
---
src/gallium/drivers/radeonsi/si_blit.c | 61 --------------------------------
src/gallium/drivers/radeonsi/si_cp_dma.c | 61 ++++++++++++++++++++++++++++++++
2 files changed, 61 insertions(+), 61 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_blit.c
b/src/gallium/drivers/radeonsi/si_blit.c
index e80bf5c2..2f7c2be 100644
--- a/src/gallium/drivers/radeonsi/si_blit.c
+++ b/src/gallium/drivers/radeonsi/si_blit.c
@@ -1316,80 +1316,19 @@ static void si_decompress_dcc(struct pipe_context *ctx,
struct r600_texture *rtex)
{
if (!rtex->dcc_offset)
return;
si_blit_decompress_color(ctx, rtex, 0, rtex->resource.b.b.last_level,
0, util_max_layer(&rtex->resource.b.b, 0),
true);
}
-static void si_pipe_clear_buffer(struct pipe_context *ctx,
- struct pipe_resource *dst,
- unsigned offset, unsigned size,
- const void *clear_value_ptr,
- int clear_value_size)
-{
- struct si_context *sctx = (struct si_context*)ctx;
- uint32_t dword_value;
- unsigned i;
-
- assert(offset % clear_value_size == 0);
- assert(size % clear_value_size == 0);
-
- if (clear_value_size > 4) {
- const uint32_t *u32 = clear_value_ptr;
- bool clear_dword_duplicated = true;
-
- /* See if we can lower large fills to dword fills. */
- for (i = 1; i < clear_value_size / 4; i++)
- if (u32[0] != u32[i]) {
- clear_dword_duplicated = false;
- break;
- }
-
- if (!clear_dword_duplicated) {
- /* Use transform feedback for 64-bit, 96-bit, and
- * 128-bit fills.
- */
- union pipe_color_union clear_value;
-
- memcpy(&clear_value, clear_value_ptr, clear_value_size);
- si_blitter_begin(ctx, SI_DISABLE_RENDER_COND);
- util_blitter_clear_buffer(sctx->blitter, dst, offset,
- size, clear_value_size / 4,
- &clear_value);
- si_blitter_end(ctx);
- return;
- }
- }
-
- /* Expand the clear value to a dword. */
- switch (clear_value_size) {
- case 1:
- dword_value = *(uint8_t*)clear_value_ptr;
- dword_value |= (dword_value << 8) |
- (dword_value << 16) |
- (dword_value << 24);
- break;
- case 2:
- dword_value = *(uint16_t*)clear_value_ptr;
- dword_value |= dword_value << 16;
- break;
- default:
- dword_value = *(uint32_t*)clear_value_ptr;
- }
-
- sctx->b.clear_buffer(ctx, dst, offset, size, dword_value,
- R600_COHERENCY_SHADER);
-}
-
void si_init_blit_functions(struct si_context *sctx)
{
- sctx->b.b.clear_buffer = si_pipe_clear_buffer;
sctx->b.b.resource_copy_region = si_resource_copy_region;
sctx->b.b.blit = si_blit;
sctx->b.b.flush_resource = si_flush_resource;
sctx->b.b.generate_mipmap = si_generate_mipmap;
sctx->b.blit_decompress_depth = si_blit_decompress_depth;
sctx->b.decompress_dcc = si_decompress_dcc;
}
diff --git a/src/gallium/drivers/radeonsi/si_cp_dma.c
b/src/gallium/drivers/radeonsi/si_cp_dma.c
index ca82626..89492d3 100644
--- a/src/gallium/drivers/radeonsi/si_cp_dma.c
+++ b/src/gallium/drivers/radeonsi/si_cp_dma.c
@@ -283,20 +283,80 @@ void si_clear_buffer(struct pipe_context *ctx, struct
pipe_resource *dst,
*
* This function is called for embedded texture metadata clears,
* but those should always be properly aligned. */
assert(dst->target == PIPE_BUFFER);
assert(size < 4);
pipe_buffer_write(ctx, dst, offset, size, &value);
}
}
+static void si_pipe_clear_buffer(struct pipe_context *ctx,
+ struct pipe_resource *dst,
+ unsigned offset, unsigned size,
+ const void *clear_value_ptr,
+ int clear_value_size)
+{
+ struct si_context *sctx = (struct si_context*)ctx;
+ uint32_t dword_value;
+ unsigned i;
+
+ assert(offset % clear_value_size == 0);
+ assert(size % clear_value_size == 0);
+
+ if (clear_value_size > 4) {
+ const uint32_t *u32 = clear_value_ptr;
+ bool clear_dword_duplicated = true;
+
+ /* See if we can lower large fills to dword fills. */
+ for (i = 1; i < clear_value_size / 4; i++)
+ if (u32[0] != u32[i]) {
+ clear_dword_duplicated = false;
+ break;
+ }
+
+ if (!clear_dword_duplicated) {
+ /* Use transform feedback for 64-bit, 96-bit, and
+ * 128-bit fills.
+ */
+ union pipe_color_union clear_value;
+
+ memcpy(&clear_value, clear_value_ptr, clear_value_size);
+ si_blitter_begin(ctx, SI_DISABLE_RENDER_COND);
+ util_blitter_clear_buffer(sctx->blitter, dst, offset,
+ size, clear_value_size / 4,
+ &clear_value);
+ si_blitter_end(ctx);
+ return;
+ }
+ }
+
+ /* Expand the clear value to a dword. */
+ switch (clear_value_size) {
+ case 1:
+ dword_value = *(uint8_t*)clear_value_ptr;
+ dword_value |= (dword_value << 8) |
+ (dword_value << 16) |
+ (dword_value << 24);
+ break;
+ case 2:
+ dword_value = *(uint16_t*)clear_value_ptr;
+ dword_value |= dword_value << 16;
+ break;
+ default:
+ dword_value = *(uint32_t*)clear_value_ptr;
+ }
+
+ si_clear_buffer(ctx, dst, offset, size, dword_value,
+ R600_COHERENCY_SHADER);
+}
+
/**
* Realign the CP DMA engine. This must be done after a copy with an unaligned
* size.
*
* \param size Remaining size to the CP DMA alignment.
*/
static void si_cp_dma_realign_engine(struct si_context *sctx, unsigned size,
unsigned user_flags, bool *is_first)
{
uint64_t va;
@@ -523,12 +583,13 @@ void cik_emit_prefetch_L2(struct si_context *sctx)
}
if (sctx->prefetch_L2_mask & SI_PREFETCH_PS)
cik_prefetch_shader_async(sctx, sctx->queued.named.ps);
sctx->prefetch_L2_mask = 0;
}
void si_init_cp_dma_functions(struct si_context *sctx)
{
+ sctx->b.b.clear_buffer = si_pipe_clear_buffer;
sctx->b.clear_buffer = si_clear_buffer;
}
--
2.7.4
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