From: Marek Olšák <[email protected]>
---
src/gallium/drivers/radeon/r600_pipe_common.c | 11 -----------
src/gallium/drivers/radeon/r600_pipe_common.h | 4 ----
src/gallium/drivers/radeonsi/si_cp_dma.c | 1 -
src/gallium/drivers/radeonsi/si_pipe.c | 6 +++---
src/gallium/drivers/radeonsi/si_test_dma.c | 2 +-
5 files changed, 4 insertions(+), 20 deletions(-)
diff --git a/src/gallium/drivers/radeon/r600_pipe_common.c
b/src/gallium/drivers/radeon/r600_pipe_common.c
index d7927aa..f410b27 100644
--- a/src/gallium/drivers/radeon/r600_pipe_common.c
+++ b/src/gallium/drivers/radeon/r600_pipe_common.c
@@ -414,30 +414,20 @@ bool si_check_device_reset(struct r600_common_context
*rctx)
return false;
status = rctx->b.get_device_reset_status(&rctx->b);
if (status == PIPE_NO_RESET)
return false;
rctx->device_reset_callback.reset(rctx->device_reset_callback.data,
status);
return true;
}
-static void r600_dma_clear_buffer_fallback(struct pipe_context *ctx,
- struct pipe_resource *dst,
- uint64_t offset, uint64_t size,
- unsigned value)
-{
- struct r600_common_context *rctx = (struct r600_common_context *)ctx;
-
- rctx->clear_buffer(ctx, dst, offset, size, value, R600_COHERENCY_NONE);
-}
-
static bool r600_resource_commit(struct pipe_context *pctx,
struct pipe_resource *resource,
unsigned level, struct pipe_box *box,
bool commit)
{
struct r600_common_context *ctx = (struct r600_common_context *)pctx;
struct r600_resource *res = r600_resource(resource);
/*
* Since buffer commitment changes cannot be pipelined, we need to
@@ -477,21 +467,20 @@ bool si_common_context_init(struct r600_common_context
*rctx,
rctx->family = rscreen->family;
rctx->chip_class = rscreen->chip_class;
rctx->b.invalidate_resource = si_invalidate_resource;
rctx->b.resource_commit = r600_resource_commit;
rctx->b.transfer_map = u_transfer_map_vtbl;
rctx->b.transfer_flush_region = u_transfer_flush_region_vtbl;
rctx->b.transfer_unmap = u_transfer_unmap_vtbl;
rctx->b.texture_subdata = u_default_texture_subdata;
rctx->b.memory_barrier = r600_memory_barrier;
- rctx->dma_clear_buffer = r600_dma_clear_buffer_fallback;
rctx->b.buffer_subdata = si_buffer_subdata;
if (rscreen->info.drm_major == 2 && rscreen->info.drm_minor >= 43) {
rctx->b.get_device_reset_status = r600_get_reset_status;
rctx->gpu_reset_counter =
rctx->ws->query_value(rctx->ws,
RADEON_GPU_RESET_COUNTER);
}
rctx->b.set_device_reset_callback = r600_set_device_reset_callback;
diff --git a/src/gallium/drivers/radeon/r600_pipe_common.h
b/src/gallium/drivers/radeon/r600_pipe_common.h
index a1ec0b8..0982d1d 100644
--- a/src/gallium/drivers/radeon/r600_pipe_common.h
+++ b/src/gallium/drivers/radeon/r600_pipe_common.h
@@ -588,24 +588,20 @@ struct r600_common_context {
struct pipe_resource *dst,
unsigned dst_level,
unsigned dst_x, unsigned dst_y, unsigned dst_z,
struct pipe_resource *src,
unsigned src_level,
const struct pipe_box *src_box);
void (*dma_clear_buffer)(struct pipe_context *ctx, struct pipe_resource
*dst,
uint64_t offset, uint64_t size, unsigned
value);
- void (*clear_buffer)(struct pipe_context *ctx, struct pipe_resource
*dst,
- uint64_t offset, uint64_t size, unsigned value,
- enum r600_coherency coher);
-
void (*blit_decompress_depth)(struct pipe_context *ctx,
struct r600_texture *texture,
struct r600_texture *staging,
unsigned first_level, unsigned last_level,
unsigned first_layer, unsigned last_layer,
unsigned first_sample, unsigned
last_sample);
void (*decompress_dcc)(struct pipe_context *ctx,
struct r600_texture *rtex);
diff --git a/src/gallium/drivers/radeonsi/si_cp_dma.c
b/src/gallium/drivers/radeonsi/si_cp_dma.c
index 89492d3..5582471 100644
--- a/src/gallium/drivers/radeonsi/si_cp_dma.c
+++ b/src/gallium/drivers/radeonsi/si_cp_dma.c
@@ -584,12 +584,11 @@ void cik_emit_prefetch_L2(struct si_context *sctx)
if (sctx->prefetch_L2_mask & SI_PREFETCH_PS)
cik_prefetch_shader_async(sctx, sctx->queued.named.ps);
sctx->prefetch_L2_mask = 0;
}
void si_init_cp_dma_functions(struct si_context *sctx)
{
sctx->b.b.clear_buffer = si_pipe_clear_buffer;
- sctx->b.clear_buffer = si_clear_buffer;
}
diff --git a/src/gallium/drivers/radeonsi/si_pipe.c
b/src/gallium/drivers/radeonsi/si_pipe.c
index bf28677..eb0283a 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.c
+++ b/src/gallium/drivers/radeonsi/si_pipe.c
@@ -315,23 +315,23 @@ static struct pipe_context *si_create_context(struct
pipe_screen *screen,
si_set_rw_buffer(sctx, SI_VS_CONST_INSTANCE_DIVISORS,
&sctx->null_const_buf);
si_set_rw_buffer(sctx, SI_VS_CONST_CLIP_PLANES,
&sctx->null_const_buf);
si_set_rw_buffer(sctx, SI_PS_CONST_POLY_STIPPLE,
&sctx->null_const_buf);
si_set_rw_buffer(sctx, SI_PS_CONST_SAMPLE_POSITIONS,
&sctx->null_const_buf);
/* Clear the NULL constant buffer, because loads should return
zeros. */
- sctx->b.clear_buffer(&sctx->b.b, sctx->null_const_buf.buffer, 0,
- sctx->null_const_buf.buffer->width0, 0,
- R600_COHERENCY_SHADER);
+ si_clear_buffer(&sctx->b.b, sctx->null_const_buf.buffer, 0,
+ sctx->null_const_buf.buffer->width0, 0,
+ R600_COHERENCY_SHADER);
}
uint64_t max_threads_per_block;
screen->get_compute_param(screen, PIPE_SHADER_IR_TGSI,
PIPE_COMPUTE_CAP_MAX_THREADS_PER_BLOCK,
&max_threads_per_block);
/* The maximum number of scratch waves. Scratch space isn't divided
* evenly between CUs. The number is only a function of the number of
CUs.
* We can decrease the constant to decrease the scratch buffer size.
diff --git a/src/gallium/drivers/radeonsi/si_test_dma.c
b/src/gallium/drivers/radeonsi/si_test_dma.c
index beb3be5..de88469 100644
--- a/src/gallium/drivers/radeonsi/si_test_dma.c
+++ b/src/gallium/drivers/radeonsi/si_test_dma.c
@@ -285,21 +285,21 @@ void si_test_dma(struct si_screen *sscreen)
i, tdst.width0, tdst.height0, tdst.array_size,
array_mode_to_string(sscreen, &rdst->surface),
tsrc.width0, tsrc.height0, tsrc.array_size,
array_mode_to_string(sscreen, &rsrc->surface), bpp);
fflush(stdout);
/* set src pixels */
set_random_pixels(ctx, src, &src_cpu);
/* clear dst pixels */
- sctx->b.clear_buffer(ctx, dst, 0, rdst->surface.surf_size, 0,
true);
+ si_clear_buffer(ctx, dst, 0, rdst->surface.surf_size, 0, true);
memset(dst_cpu.ptr, 0, dst_cpu.layer_stride * tdst.array_size);
/* preparation */
max_width = MIN2(tsrc.width0, tdst.width0);
max_height = MIN2(tsrc.height0, tdst.height0);
max_depth = MIN2(tsrc.array_size, tdst.array_size);
num = do_partial_copies ? num_partial_copies : 1;
for (j = 0; j < num; j++) {
int width, height, depth;
--
2.7.4
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